Pedro Pereira

Tourism is an industry that has been growing rapidly in the last few years and it is expected that it will continue to grow. Due to the evolution of technology, mobile applications are being increasingly used in all kinds of industries, being one of them tourism. Presently there are already a few mobile applications used to increase the experience of the user when visiting a place, but these mobile applications lack some important features. This paper describes the development of a mobile application with integrated routing algorithms used to increase the experience of the tourists when visiting the city of Avila, Spain. The tourist will have at their disposal real time information about all the monuments available for visit, a full set of predefined circuits with different visit times and degrees of difficulty and also the possibility to create an optimized or personalized circuit combining the user preferences such as visiting time and number of monuments to visit.

In this paper we deal with analog active filter design using discrete components taking into consideration tolerance effects. Sensitivity analysis is performed to determine the most influential components in the considered circuit, thus relative higher precision is offered to those parameters. Further, an in-loop optimization technique is considered, thus actual IC models are handled. An application example is presented. HSpice simulation results, supported by Monte Carlo analysis, are given to highlight efficiency of the proposed selection technique.

The complex data exchange between architectural design and building energy simulation constitutes the main challenge in the use of energy performance analyses in the early design stage. The enhancement of BIM model data with additional specific energy-related information and the subsequent mapping to the input of an energy analysis or simulation tool is yet an open issue. This paper examines three approaches for the data transfer from 3D CAD applications to building performance simulations using BIM as central data repository and points out their current and envisaged use in practice. The first approach addresses design scenarios. It focuses on the supporting tools needed to achieve interoperability given a 74 wide-spread commercial BIM model (Autodesk Revit) and a dedicated pre-processing tool (DesignBuilder) for EnergyPlus. The second approach is similar but addresses retrofitting scenarios. In both workflows gbXML is used as the transformation format. In the third approach a standard BIM model, IFC is used as basis for the transfer process for any relevant lifecycle phase.

Abstract This paper deals with multiobjective analog circuit optimization taking into consideration performance sensitivity vis-a-vis parameters' variations. It mainly considers improving computation time of the inloop optimization approaches by including sensitivity considerations in the Pareto front generation process, not as a constraint, but by involving it within the used metaheuristic evolution process. Different approaches are proposed and compared. NSGA-II metaheuristic is considered. The proposed sensitivity aware approaches are showcased via two analog circuits, namely, a second generation \{CMOS\} current conveyor and a \{CMOS\} voltage follower. We show that the proposed ideas considerably alleviate the long computation time of the process and improve the quality of the generated front, as well.

This work deals with the multi-objective optimization of analog circuits by generating the Pareto front where elements are low sensitive to parameters' variations. NSGA-II is used for obtaining the non-dominated solutions. Richardson extrapolation technique is used for the in-loop optimization approach for computing partial derivatives and, thus, the solutions' sensitivity. NSGA-II Pareto fronts' intrinsic ranking is exploited for the generation of the new ‘low-sensitive’ Pareto front. The case of the optimal sizing of a CMOS voltage follower is considered to exemplify the proposed approach.

Power Quality is a generic term focusing on several issues, going from reliability to the quality of service provided by the energy supplier. It addresses limiting aspects such as harmonic distortion, flicker, sags, swells and transients... It is important for the students to understand the differences between the large amounts of events that fit into poor power quality category. Moreover it is important for them to analyze real time non-laboratory events. To provide this experience to the students this paper presents a remote m-learning experimental system where several types of poor power quality events can be tested. The developed system is based on a power quality analysis distributed network and can be remotely accessed from a remote computer or smart phones.

Voltage-Controlled Oscillators (VCOs) are widely used in wireless transceivers. Due to the stringent specifications regarding phase-noise, LC-VCOs are usually adopted. The need for maximizing phase-noise as well as minimizing the power consumption makes imperious the adoption of optimization-based design methodologies. For the optimization of the LC-VCO characteristics, special attention must be paid to the integrated inductor design, since its quality factor may have a strong influence in the LC-VCO phase-noise. Furthermore, designers must ensure that the higher limit of VCO operating frequency is sufficiently below the inductor resonant frequency. In this chapter, a study on the influence of the quality factor of the inductors on the LC-VCO overall behavior is presented. Then, optimization of integrated inductors by exploring the inductor geometric layout is presented. Finally, results obtained for the design of an LC-VCO in 130nm Technology using a previously optimized inductor are presented.

Abstract This paper proposes a hybrid methodology for the evaluation of integrated inductors sensitivity against technological/geometrical parameters variation. The obtained results are used in an optimization-based design environment for integrated inductors, as a way of guaranteeing that obtained solutions are robust against parameter variation. For the inductor characterization, a lumped element model is used, where each element value is evaluated through physics based equations. The sensitivity of the inductor characterization to parameter variations is evaluated at two levels. At the physical level, the sensitivity of the model element values to technological/geometrical parameters variations is computed through an equation-based strategy. Then, the sensitivity of the inductor characterization to the model parameter variations is obtained through a simulation-based approach, where the Richardson extrapolation technique is used for the calculation of the partial derivatives. Several examples considering the evaluation of sensitivity of both inductance and quality factor of two inductors in \{UMC130\} technology are presented. Obtained results are compared against Monte-Carlo simulations.

This paper presents a remote laboratory linked with mobile devices for real data analysis on the field of power quality. A global system was developed from the power quality analyzer into the human machine interface devoted to the m-learning system. This m-learning system is intended to be used in a long life learning perspective. The developed remote laboratory is a good opportunity for people, even without deep knowledge on the field, to learn power quality principles in an applied way. Since the system is based on real data, is a good approach to give trainees practical knowledge on the field.

The goal of this paper is to present a comparison among three known metaheuristics: Genetic Algorithm (GA), Particle Swarm Optimization (PSO) and Simulated Annealing (SA). For the comparison, the design of an LC - Voltage Controlled Oscillator (LC-VCO) is considered, where the minimization of both VCO phase noise and power consumption is envisaged. The objective of this comparison is to find the algorithm yielding the best solution. The validity of the solution obtained with each metaheuristic algorithm is checked against HSPICE/RF simulation results. Robustness checks for each algorithm are presented at the end of this paper.

The progressive scaling of CMOS technology towards nanometre sizes has made the implementation of highly integrated systems for the wireless communication systems possible. Additionally, higher speed, lower power consumption and area reduction has been reached. Due to the high-density integration needs, as well as to low cost fabrication, RF applications, such as the LC-voltage controlled oscillator (LC-VCO), are usually implemented in CMOS technology. The complexity of designing LC-VCOs has lead to the development of several design methodologies. This chapter introduces an optimization based methodology for the design of LC-VCOs, where its efficiency is granted by the use of analytical models to characterize the active and passive elements’ behaviour.

The continuing size reduction of electronic devices imposes design challenges to optimize the performances of modern electronic systems, such as: wireless services, telecom and mobile computing. Fortunately, those design challenges can be overcome thanks to the development of Electronic Design Automation (EDA) tools. In the analog, mixed signal and radio-frequency (AMS/RF) domains, circuit optimization tools have demonstrated their usefulness in addressing design problems taking into account downscaling technological aspects. Recent advances in EDA have shown that the simulation-based sizing technique is a very interesting solution to the ‘complex’ modelling task in the circuit design optimization problem. In this paper we propose a multi-objective simulation-based optimization tool. A CMOS LC-VCO circuit is presented to show the viability of this tool. The tool is used to generate the Pareto front linking two conflicting objectives, namely the VCO Phase Noise and Power Consumption. The accuracy of the results is checked against HSPICE/RF simulations.

The advancement of CMOS technology led to the integration of more complex functions. In the particular of wireless transceivers, integrated LC tanks are becoming popular both for VCOs and integrated filters [1]. For RF applications the main challenge is still the design of integrated inductors with the maximum quality factor. For that purpose, tapered, i.e., variable width inductors have been proposed in the literature. In this paper, analytical expressions for the determination the pi-model parameters, for the characterization of variable width integrated inductors are proposed. The expressions rely exclusively on geometrical and technological parameters, thus granting the rapid adaptation of the model to different technologies. The results obtained with the model are compared against simulation with ASITIC, showing errors below 10%. The model is then integrated into an optimization procedure where inductors with a quality factor improvement in the order of 20-30% are obtained, when compared with fixed width inductors.

Progressive scaling of CMOS technology towards nanoscale regime enables the design of highly integrated systems for the wireless communications market. As technology continues to scale, the variability in process parameters may cause significant deviations in device behaviour. The complexity of designing spiral inductors has lead to the development of multi-objective optimization based design methodologies yielding the generation of Pareto-optimal surfaces. However, the variability of the process parameters is usually ignored, yielding the selection of ideally optimal solutions in detriment of quasi-optimal solutions that may prove to be better, should the robustness against process parameter variation be accounted for. We propose the generation of an extended Pareto front containing both optima and quasi-optima solutions. Finally information on the robustness to process parameter variations, is used for electing the best design solutions.The evaluation of the extended set of sub-optima solutions requires methods capable to find the set of local optima, since solutions that are close to each other in the performance index space may be very distant in the design parameter space.

This paper introduces an optimization methodology for the design of RF varactors. The characterization of the varactor behaviour is supported by a set of equations based on technological parameters, granting the accuracy of the results, as well as the adaptability of the model to any technology. The varactor design is achieved through the implementation of a Genetic Algorithms (GA) optimization methodology, which is able to deal with continuous and/or discrete variables, making possible to suit both technological and layout constraints. A set of working examples for UMC130 technology are addressed. The results presented, spotlight the potential of varactor analytical model, combined with a GA optimization procedure, when integrated in optimization design tools. The accuracy of the results is checked against HSPICE simulator.

This Chapter presents the optimal design of radio-frequency integrated spiral inductors. The basic idea is to generate an analytical model to characterize integrated inductors based on the double {\ensuremathπ}-model, and offer to the designer an approach to determine the inductor layout parameters. Particle Swarm Optimization technique is used to generate optimal values of parameters of the developed models. Viability of the proposed models is highlighted via comparison with ASITIC simulation results.

In his paper the design of LC-VCOs is addressed. Due to the high-density integration needs as well as to low cost fabrication, RF applications are usually implemented in CMOS technology. However, this technology development brought up several issues such as the degradation of on-chip LC tank quality factor, yielding VCO's phase noise limitation. To overcome phase-noise limitations, optimization design methodologies are usually used. Since electromagnetic simulations are timely expensive, model based approaches are needed. In this work the characterization of the oscillator behaviour is guaranteed by a set of analytical models describing each circuit element performance. A set of working examples for UMC130 technology, aiming the VCO phase noise and power consumption optimization, is addressed. The results presented, spotlight the potential of the proposed design methodology, combined with a GA optimization procedure, for an accurate and timely efficient oscillator design. The accuracy of the results is checked against HSPICE/RF simulator.

This paper introduces a variability-aware methodology for the design of LC-VCOs in Nano-CMOS technologies. The complexity of the design as well as the necessity for having an environment offering the possibility for exploring design trade-offs has led to the development of design methodologies based multi-objective optimization procedures yielding the generation of Pareto-optimal surfaces. The efficiency of the process is granted by using analytical models for both passive and active devices. Although physics-based analytical expressions have been proposed for the evaluation of the lumped elements, the variability of the process parameters is usually ignored due to the difficulty to formalize it into an optimization performance index. The usually adopted methodology of considering only optimum solutions for the Pareto surface, may lead to pruning quasi-optimal solutions that may prove to be better, should their sensitivity to process parameter variation be accounted for. In this work we propose starting by generating an extended Pareto surface where both optimum and quasi-optimum solutions are considered. Finally information on the sensitivity to process parameter variations, is used for electing the best design solution.

This paper addresses an optimization-based approach for the design of RF integrated inductors. The methodology presented deals with the complexity of the design problem by formulating it as a multi-objective optimization. The multi-modal nature of the underlying functions combined with the need to be able to explore design trade-offs leads to the use of niching methods. This allows exploring not only the best trade-off solutions lying on the Pareto-optimum surface but also the quasi-optimum solutions that would be otherwise discarded. In this paper we take advantage of the niching properties of lbest PSO algorithm using ring topology to devise a simple optimizer able to find the local-optima. For the efficiency of the process analytical models are used for the passive/active devices. In spite the use of physics-based analytical expressions for the evaluation of the lumped elements, the variability of the process parameters is ignored in the optimization stage due to the significant computational burden it involves. Thus in the final stage both the Pareto-optimum solutions and the quasi-optimum solutions are evaluated with respect to the sensitivity to process parameter variations.

The high prices currently achieved in the acquisition of non-renewable energy for electricity production and the low levels of energy efficiency in the housing sector are the national situation, which leads the Portuguese government to encourage the acquisition, the installation and the use of technologies which exploit indigenous and renewable energy. This study presents an application that was developed in order to help the citizen in his decision to invest in renewable technologies in their homes. The application is able to elaborate an economic analysis based on the selected type of renewable technology, providing the user with the knowledge of benefits and the annual costs involved in the system that he selected. This tool aims at facilitating the interaction of any user with such technologies and it can be used as a helpful tool to support the decision of investment in such systems.

This paper addresses the automatic generation of RF integrated inductors model. In this work the double p-model is used as a way of characterizing the inductor behaviour over a frequency range beyond the self-resonant value. For the evaluation of the model element values analytical expressions based on technology parameters as well as on the device geometric characteristics are used. The use of a technology-based methodology for the evaluation of the model parameters grants the adaptability of the models generated to any technology. The inductor analytical characterization is integrated into an optimization-based tool for the automatic design of RF integrated inductors. This tool uses a Genetic Algorithm (GA) optimization procedure, where user defined constraints on the design parameters are taken into account. Due to the design constraints nature and topology constraints, discrete variables optimization techniques are used.

This work introduces a tool for the optimization of CMOS integrated spiral inductors. The main objective of this tool is to offer designers a first approach for the determination of the inductor layout parameters. The core of the tool is a Genetic Algorithm (GA) optimization procedure where technology constraints on the inductor layout parameters are considered. Further constraints regarding inductor design heuristics are also accounted for. Since the layout parameters are inherently discrete due to technology and topology constraints, discrete variable optimization techniques are used. The Matlab GA toolbox is used and the modifications on the GA functions, yielding technology feasible solutions is presented. For the sake of efficiency and simplicity the pi-model is used for characterizing the inductor. The validity of the design results obtained with the tool, is checked against circuit simulation with ASITIC.

This paper introduces a tool for the optimization of CMOS integrated spiral inductors. Its aim is to offer designers a first approach on designing inductors without the need for fabrication. The core of the tool is an optimization procedure where technology constraints on the inductor layout parameters are considered by applying user-defined discretization on the design variables. User-defined constraints between layout parameters may also be accounted for, as a way of taking into account design heuristics. For those cases where the device area is a major concern area minimization may be considered. On the other hand, if a major design goal is the inductor quality factor the tool may yield the layout parameters which maximize the quality factor. The trade-off between quality factor and device area is evaluated through the generation of a graphical representation of quality factor versus output diameter for a given inductance. For the sake of simplicity the pi-model has been used for characterising the inductor. The application was developed in Matlab and the optimization toolbox is used. The validity of the design results obtained is checked against circuit simulation with ASITIC.

In this paper a discrete-variable optimization methodology for the automatic design of CMOS integrated spiral inductors is introduced. The use of discrete variable optimization procedure offers the designer the possibility for exploring the design space exclusively in those points available for the technology under use. Further user-defined constraints between layout parameters may also be incorporated as a way of taking into account design heuristics. A comparison between using discrete-variable optimization and a continuous optimization procedure followed by a discretization of the results is presented, where the benefits of the proposed methodology are presented. An application using the proposed methodology was developed in Matlab and the optimization toolbox is used. For the sake of simplicity the pi-model has been used for characterizing the inductor. The validity of the design results is checked against circuit simulation with ASITIC.

This paper presents an analytical model for CMOS delay and power estimation in deep sub micrometer technologies. In this paper the EKV transistor model is considered as a way of granting the accuracy of results in the characterization of deep submicron CMOS circuits. The analytical model proposed is valid for a ramp input signal, and takes into account all the operation regions of the transistor as well the influence of the gate-to-drain capacitance. For estimating the power consumption, a simple numerical integration process is applied to the current wave. An application example considering the use of the model for the evaluation of the delay and power consumption associated to a CMOS inverter is considered. The validity of the results obtained with the proposed model for a 1.2V TSMCN65 CMOS inverter is checked against those obtained through Hspice simulation.