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Lourenço, J. M., and G. Cunha, "Testing patterns for software transactional memory engines", Proceedings of the 5th Workshop on Parallel and Distributed Systems: Testing, Analysis, and Debugging (PADTAD'07), New York, NY, USA, ACM, pp. 36–42, 2007. Abstractpadtad21s.pdf

The emergence of multi-core processors is promoting the use of concurrency and multithreading. To raise the abstraction level of synchronization constructs is fundamental to ease the development of concurrent software, and Software Transactional Memory (STM) is a good approach towards such goal. However, execution environment issues such as the processor instruction set, caching policy, and memory model, may have strong influence upon the reliability of STM engines. This paper addresses the testing of STM engines aiming at improving their reliability and independence from execution environment. From our experience with porting and extending a specific STM engine, we report on some of the bugs found and synthesize some testing patterns that proved to be useful at testing STM engines.

Lourenço, J. M., and J. C. Cunha, "A Thread-Level Distributed Debugger", Proceedings of the 3rd International Conference on Vector and Parallel Processing (VecPar'98), Porto, Portugal, Universidade do Porto, pp. 359–366, 1998. Abstractvecpar98.pdf

In order to address the diversity of existing parallel programming models, it is important to provide development environments that can be incrementally extended with new services. Concerning the debugging of process based models, we have previously designed and implemented a basic interface that can be accessed by other tools as well as by debugging modules associated with high-level programming languages.

Lourenço, J. M., and J. C. Cunha, "The PDBG Process-Level Debugger for Parallel and Distributed Programs", Proceedings of the SIGMETRICS symposium on Parallel and Distributed Tools, New York, NY, USA, ACM, pp. 154, 1998. Abstractspdt-asbt98.pdf

In this paper we discuss several issues concerning the design and implementation of a debugger for parallel and distributed applications. This debugger uses a client-server approach to isolate the debugging user-interface from the debugging services, by way of a two-level structured approach: the component-level to observe and act upon individual processes; and the coordination-level to observe the interprocess relations and act upon them.

Lourenço, J. M., R. J. Dias, J. Luís, M. Rebelo, and V. Pessanha, "Understanding the Behavior of Transactional Memory Applications", Proceedings of the 7th Workshop on Parallel and Distributed Systems: Testing, Analysis, and Debugging (PADTAD'09), New York, NY, USA, ACM, pp. 31–39, 2009. Abstractpadtad2009.pdf

Transactional memory is a new trend in concurrency control that was boosted by the advent of multi-core processors and the near to come many-core processors. It promises the performance of finer grain with the simplicity of coarse grain threading. However, there is a clear absence of software development tools oriented to the transactional memory programming model, which is confirmed by the very small number of related scientific works published until now. This paper describes ongoing work. We propose a very low overhead monitoring framework, developed specifically for monitoring TM computations, that collects the transactional events into a single log file, sorted in a global order. This framework is then used by a visualization tool to display different types of charts from two categories: statistical charts and thread-time space diagrams. These last diagrams are interactive, allowing to identify conflicting transactions. We use the visualization tool to analyse the behavior of two different, but similar, testing applications, illustrating how it can be used to better understand the behavior of these transactional memory applications.

Lourenço, J. M., "Mecanismos de Suporte à Execução Concorrente de Programas em Lógica", Universidade Nova de Lisboa: Faculdade de Ciências e Tecnologia, Universidade Nova de Lisboa, 1994. Abstractmsc-thesis94.pdf

A evolução do hardware dos computadores para arquitecturas paralelas, incentivou a concepção de novos modelos de programação e o desenvolvimento dos sistemas de suporte à execução correspondentes, de forma a conseguir uma melhor exploração do paralelismo. A linguagem de programação Prolog, pelas suas características declarativas e operacionais, tem vindo a ser objecto de estudo nesta área, através de adaptações da linguagem e/ou da sua máquina de inferência. Este trabalho incide sobre os aspectos de concepção e implementação de um modelo de um sistema de suporte à execução de programas em Prolog, em arquitecturas de múltiplos processadores, com unidades de memória fisicamente distribuídas. O modelo propõe extensões a um executor de Prolog convencional, de forma a disponibilizar funcionalidades que permitam o controlo do paralelismo e da distribuição. Estas funcionalidades podem ser utilizadas para a implementação de modelos de linguagens lógicas concorrentes de mais alto nível, ou então serem utilizadas directamente para a programação de sistemas distribuídos, em que múltiplos executores Prolog cooperam na resolução de um golo, comunicando com base em mensagens. Para avaliar a funcionalidade do modelo proposto, concebeu-se e implementou-se um sistema de distribuição de golos Prolog, que permite recorrer a diversas estratégias para composição sequencial e paralela de golos, escondendo os aspectos de gestão explícita dos recursos efectivos. A dissertação inclui uma discussão dos aspectos mais relevantes da realização do protótipo do modelo proposto sobre uma arquitectura baseada em Transputers.

Lourenço, J. M., and J. C. Cunha, "Fiddle: A Flexible Distributed Debugging Architecture", Proceedings of the International Conference on Computational Science-Part II, London, UK, Springer-Verlag, pp. 821–830, 2001. Abstracticcs01.pdf

In the recent past, multiple techniques and tools have been proposed and contributed to improve the distributed debugging functionalities, in several distinct aspects, such as handling the non-determinism, allowing cyclic interactive debugging of parallel programs, and providing more user-friendly interfaces. However, most of these tools are tied to a specific programming language and provide rigid graphical user interfaces. So they cannot easily adapt to support distinct abstraction levels or user interfaces. They also don't provide adequate support for cooperation with other tools in a software engineering environment. In this paper we discuss several dimensions which may contribute to develop more flexible distributed debuggers. We describe Fiddle, a distributed debugging tool which aims at overcoming some of the above limitations.

Lourenço, J. M., "A Debugging Engine for Parallel and Distributed Programs", Universidade Nova de Lisboa: Faculdade de Ciências e Tecnologia, 2004. Abstractfiddle-thesis.pdf

In the last decade a considerable amount of research work has focused on distributed debugging, one of the crucial fields in the parallel software development cycle. The productivity of the software development process strongly depends on the adequate definition of what debugging tools should be provided, and what debugging methodologies and functionalities should these tools support. The work described in this dissertation was initiated in 1995, in the context of two research projects, the SEPP (Software Engineering for Parallel Processing) and HPCTI (High-Performance Computing Tools for Industry), both sponsored by the European Union in the Copernicus program, which aimed at the design and implementation of an integrated parallel software development environment. In the context of these projects, two independent toolsets have been developed, the GRADE and EDPEPPS parallel software development environments. Our contribution to these projects was in the debugging support. We have designed a debugging engine and developed a prototype, which was integrated the both toolsets (it was the only tool developed in the context of the SEPP and HPCTI projects which achieved such a result). Even after the closing of those research projects, further research work on distributed debugger has been carried on, which conducted to the re-design and re-implementation of the debugging engine. This dissertation describes the debugging engine according to its most up-to-date design and implementation stages. It also reposts some of the experimental work made with both the initial and the current implementations, and how it contributed to validate the design and implementations of the debugging engine.

Lourenço, J. M., N. Preguiça, R. J. Dias, J. N. Silva, J. Garcia, and L. Veiga, "NGenVM: New Generation Execution Environments", EuroSys, Nuremberg, Germany, 2009. Abstractngenvm-poster.pdf

This document describes a work-in-progress development of NGen-VM, a distributed infrastructure that manages execution environments with run-time and programming language support targeting applications developed in the Java programming language, deployed over clusters of many-core computers. For each running application or suite of related applications, a dedicated single-system image will be provided, regardless of the concurrent threads running on a single machine (on several cores) or scattered on different computers. Such system images rely on a single model for concurrency management (Transactional Shared Memory Model), in order fill the gap between the hardware infrastructure of clusters of many-core nodes and the application runtime that is independent from that hardware infrastructure. Interactions between threads in the same tasks will be supported by a Transactional Memory framework that provides the programming language with Atomic and Isolated code regions. Interactions between thread on different machines will also use the Transactional Memory model, but now resorting to a Distributed Shared Memory abstraction.

Lourenço, J. M., J. C. Cunha, H. Krawczyk, P. Kuzora, M. Neyman, and B. Wiszniewski, "An integrated testing and debugging environment for parallel and distributed programs", EUROMICRO Conference, Los Alamitos, CA, USA, IEEE Computer Society, pp. 291, 1997. Abstracteuromicro97.pdfWebsite

To achieve a certain degree of confidence that a given program follows its specification, a testing phase must be included in the program development process, and also a complementary debugging phase to help locating the program's bugs. This paper presents an environment which results of the composition and integration of two basic tools: STEPS (Structural TEsting of Parallel Software), which is a testing tool, and DDBG (Distributed DeBuGger), which is a debugging tool. The two tools are presented individually as stand-alone tools, and we describe how they were combined through the use of another intermediate tool: DEIPA (Deterministic re-Execution and Interactive Program Analysis). We claim that the result achieved is a very effective testing and debugging environment.

Lourenço, J. M., and J. C. Cunha, "Replaying Distributed Applications with RPVM", Proceeding of the 2nd Austrian-Hungarian Workshop on Distributed and Parallel Systems (DAPSYS'98): University of Vienna, 1998. Abstractdapsys98.pdf

Parallel debugging is complex and difficult. Complex because the programmer has to deal with multiple program flows and process interactions, and difficult due to the very limited choice on effective and easy-to-use debugging tools for parallel programming. Simple and necessary features for parallel debugging are absent even from commercial debuggers, such as a record-replay feature, that allows to re-execute multiple times a parallel application assuring that during each re-execution the internal race conditions are solved in the same way they were in the first time. Some work has been done on record-replay techniques for parallel and distributed applications, but just a few have been applied to specific systems (such as PVM or MPI), and even less have produced working prototypes. In this paper we describe a method designed to work with the PVM system and how it was implemented to provide a working prototype.

Lourenço, J., D. Sousa, B. C. Teixeira, and R. J. Dias, "Detecting concurrency anomalies in transactional memory programs", Comput. Sci. Inf. Syst., vol. 8, issue 2, no. 2, pp. 533–548, 2011. Abstractcomsis-2011.pdf

Software transactional memory is a promising programming model that adapts many concepts borrowed from the databases world to control concurrent accesses to main memory (RAM). This paper discusses how to support revertible operations, such as memory allocation and release, within software libraries that will be used in software memory transactional contexts. The proposal is based in the extension of the transaction life cycle state diagram with new states associated to the execution of user-defined handlers. The proposed approach is evaluated in terms of functionality and performance by way of a use case study and performance tests. Results demonstrate that the proposal and its current implementation are flexible, generic and efficient

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Kwiatkowski, J., M. Andruszkiewicz, E. Luque, T. Margalef, J. C. Cunha, J. M. Lourenço, H. Krawczyk, and S. Szejko, "Teaching parallel processing: development of curriculum and software tools", SIGCUE Outlook, vol. 24, New York, NY, USA, ACM, pp. 159–161, 1996. Abstractsigcse96.pdfWebsite

This paper presents an approach to education in Parallel and Distributed Processing undertaken in the Technical University of Gdansk and Technical University of Wroclaw. The paper gives a detailed structure of the project entitled "Teaching Parallel Processing: Development of Curriculum and Software Tools" which was started in 1994 and will be finish in 1997. Two universities from Poland: Technical University of Gdansk and Technical University of Wroclaw and two universities from EC countries: University Autònoma of Barcelona from Spain and University Nova of Lisbon from Portugal participate in the presented project. The main aim of the project is to develop existing curricula of Computer Science specialisation and to establish specialisation concerned with parallel and distributed processing at Polish universities.

Kacsuk, P., J. C. Cunha, G. Dózsa, J. M. Lourenço, T. Fadgyas, and T. Antão, "A graphical development and debugging environment for parallel programs", Parallel Comput., vol. 22, Amsterdam, The Netherlands, The Netherlands, Elsevier Science Publishers B. V., pp. 1747–1770, 1997. Abstractpar-comp97.pdfWebsite

To provide high-level graphical support for PVM (Parallel Virtual Machine) based program development, a complex programming environment (GRADE) is being developed. GRADE currently provides tools to construct, execute, debug, monitor and visualise message-passing parallel programs. It offers high-level graphical programming abstraction mechanism to construct parallel applications by introducing a new graphical language called GRAPNEL. GRADE also provides the programmer with the same graphical user interface during the program design and debugging stages. A distributed debugging engine (DDBG) assists the user in debugging GRAPNEL programs on distributed memory computer architectures. Tape/PVM and PROVE support the performance monitoring and visualization of parallel programs developed in the GRADE environment.

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Hollander, Y., A. Hu, J. M. Lourenço, and R. Morad, "Special Session on Debugging", Hardware and Software: Verification and Testing, vol. 6504: Springer Berlin / Heidelberg, pp. 24–28, 2011. Abstracthvc2010-secial_session_on_debugging.pdf

In software, hardware, and embedded system domains, debugging is the process of locating and correcting faults in a system. Depending on the context, the various characteristics of debugging induce different challenges and solutions. Post-silicon hardware debugging, for example, needs to address issues such as limited visibility and controllability, while debugging software entails other issues, such as the handling of distributed or non-deterministic computation. The challenges that accompany such issues are the focus of many current research efforts. Solutions for debugging range from interactive tools to highly analytic techniques. We have seen great advances in debugging technologies in recent years, but bugs continue to occur, and debugging still encompasses significant portions of the life-cycles of many systems. The session covered state-of-the-art approaches as well as promising new research directions in both the hardware and software domains.

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Fiedor, J., Z. Letko, J. Lourenço, and T. Vojnar, "On Monitoring C/C++ Transactional Memory Programs", Mathematical and Engineering Methods in Computer Science, vol. 8934: Springer International Publishing, pp. 73–87, 2014. Abstractmemics14-monitoring-tm.pdf

Transactional memory (TM) is an increasingly popular technique for synchronising threads in multi-threaded programs. To address both correctness and performance-related issues of TM programs, one needs to monitor and analyse their execution. However, monitoring concurrent programs (including TM programs) may have a non-negligible impact on their behaviour, which may hamper the objectives of the intended analysis. In this paper, we propose several approaches for monitoring TM programs and study their impact on the behaviour of the monitored programs. The considered approaches range from specialised lightweight monitoring to generic heavyweight monitoring. The implemented monitoring tools are publicly available to the scientific community, and the implementation techniques used for lightweight monitoring of TM programs may be used as an inspiration for developing other specialised lightweight monitors.

Farchi, E., R. M. Hierons, and J. M. Lourenço, "Special issue on Testing, Analysis and Debugging of Concurrent Programs", Software Testing, Verification and Reliability, vol. 25, no. 3, pp. 165–166, May, 2015. AbstractWebsite

This special issue concerns a range of issues related to the development of concurrent programs. This is an important topic, because many systems are now either multi-threaded or distributed, and it is well known that concurrency makes testing, analysis and debugging significantly more complicated. Essentially, the alternative interleavings of events can lead to different behaviours, and so any analysis, debugging or testing technique must consider these interleavings. The interest in this topic is reflected in the larger than normal issue, which contains five papers. The papers fall into three groups: we start with a paper on debugging, then have two on static analysis techniques and finally have two on testing. All papers were reviewed in the normal way.

Farchi, E., I. Segall, J. M. Lourenço, and D. Sousa, "Using Program Closures to Make an Application Programming Interface (API) Implementation Thread Safe", PADTAD'12: Proceedings of the 10th Workshop on Parallel and Distributed Systems: Testing, Analysis, and Debugging, Minneapolis, MN, USA, ACM, 2012. Abstractprogramclosure.pdf

A set of methods defining an API (Application Programming Interface) are to be made thread safe; thus running any subset of these methods in parallel should not create races or deadlocks. Originally, the set of methods were not designed to be thread safe, so races and deadlocks are expected when running them in parallel. The number of possible interleavings when running methods from this API in parallel is huge, and this work focuses on the identification of the high level data races introduced by such interleavings. We propose an analysis that avoids the exhaustive exploration of all possible interleavings. For a concurrent program P, the closure of P, clos(P), is defined. Roughly speaking, we can say that the clos(P) is obtained by adding threads to P in such a way that high level data races resulting from running P in parallel to other programs are exposed statically. A set of methods representing the API is then modeled as a set of concurrent programs and their closure is analysed to identify high level data races. These high level data races are then inspected and removed to make the API thread safe. We illustrate the application of this methodology with a simple use case.

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Duro, N., R. Santos, J. M. Lourenço, H. Paulino, and J. Martins, "Open Virtualization Framework for Testing Ground Systems", Proceedings of the 8th Workshop on Parallel and Distributed Systems (PADTAD'10), New York, NY, USA, ACM, pp. 67–73, 2010. Abstractpadtad-duro-2010.pdf

The recent developments in virtualization change completely the panorama of the Hardware/OS deployment. New bottlenecks arise in the deployment of application stacks, where IT industry will spend most of the time to assure automation. VIRTU tool aims at managing, configuring and testing distributed ground applications of space systems on a virtualized environment, based on open tools and cross virtualization support. This tool is a spin-off of previous activities performed by the European Space Operations Center (ESOC) and thus it covers the original needs from the ground data systems infrastructure division of the European Space Agency. VIRTU is a testing oriented solution. Its ability to group several virtual machines in an assembly provides the means to easily deploy a full testing infrastructure, including the client/server relationships. The possibility of making on-demand request of the testing infrastructure will provide some infrastructure optimizations, specially having in mind that ESA maintains Ground Control software of various missions, and each mission cam potentially have a different set of System baselines and last up to 15 years. The matrix array of supported system combinations is therefore enormous and any improvement on the process provides substantial benefits to ESA, by reducing the effort and schedule of each maintenance activity. The ESOC's case study focuses on the development and validation activities of infrastructure or mission Ground Systems solutions. The Ground Systems solutions are typically composed of distributed systems that could take advantage of virtualized environments for testing purposes. Virtualization is used as way to optimize maintenance for tasks such as testing new releases and patches, test different system's configurations and replicate tests. The main benefits identified are related to deployment test environment and the possibility to have on-demand infrastructure.

Duarte Vitor, Lourenço João M., C. J. C., "Supporting On-line Distributed Monitoring and Debugging", Parallel and Distributed Computing Practices, vol. 4, no. 3, pp. 43–59, 2001. Abstractpdcp.pdfWebsite

Monitoring systems have traditionally been developed with rigid objectives and functionalities, and tied to specific languages, libraries and run-time environments. There is a need for more flexible monitoring systems which can be easily adapted to distinct requirements. On-line monitoring has been considered as increasingly important for observation and control of a distributed application. In this paper we discuss monitoring interfaces and architectures which support more extensible monitoring and control services. We describe our work on the development of a distributed monitoring infrastructure, and illustrate how it eases the implementation of a complex distributed debugging architecture. We also discuss several issues concerning support for tool interoperability and illustrate how the cooperation among multiple concurrent tools can ease the task of distributed debugging.

Duarte, V., J. M. Lourenço, and J. C. Cunha, "Supporting on-line distributed monitoring and debugging", On-Line Monitoring Systems and Computer Tool Interoperability, Commack, NY, USA, Nova Science Publishers, Inc., pp. 43–59, 2003. Abstractpdcp.pdf

Monitoring systems have traditionally been developed with rigid objectives and functionalities, and tied to specific languages, libraries and run-time environments. There is a need for more flexible monitoring systems which can be easily adapted to distinct requirements. On-line monitoring has been considered as increasingly important for observation and control of a distributed application. In this paper we discuss monitoring interfaces and architectures which support more extensible monitoring and control services. We describe our work on the development of a distributed monitoring infrastructure, and illustrate how it eases the implementation of a complex distributed debugging architecture. We also discuss several issues concerning support for tool interoperability and illustrate how the cooperation among multiple concurrent tools can ease the task of distributed debugging.

Dikaiakos, M., O. Rana, S. Ur, and J. M. Lourenço, "Topic 1: Support Tools and Environments", Euro-Par 2008 Parallel Processing, vol. 5168, Berlin, Heidelberg, Springer-Verlag, pp. 1–2, 2008. Abstract

The spread of systems that provide parallelism either «in-the-large» (grid infrastructures, clusters) or «in-the-small» (multi-core chips), creates new opportunities for exploiting parallelism in a wider spectrum of application domains. However, the increasing complexity of parallel and distributed platforms renders the programming, the use, and the management of these systems a costly endeavor that requires advanced expertise and skills. Therefore, there is an increasing need for powerful support tools and environments that will help end-users, application programmers, software engineers and system administrators to manage the increasing complexity of parallel and distributed platforms.

Dias, R. J., T. M. Vale, and J. M. Lourenço, "Efficient support for in-place metadata in Java software transactional memory", Concurrency and Computation: Practice and Experience, vol. 25, no. 17, pp. 2394–2411, 2013. Abstractccpe2013-dias.pdfWebsite

Software transactional memory (STM) algorithms associate metadata with the memory locations accessed during a transaction's lifetime. This metadata may be stored in an external table by resorting to a mapping function that associates the address of a memory cell with the table entry containing the corresponding metadata (out-place or external strategy). Alternatively, the metadata may be stored adjacent to the associated memory cell by wrapping the cell and metadata together (in-place strategy). The implementation techniques to support these two approaches are very different and each STM framework is usually biased towards one of them, only allowing the efficient implementation of STM algorithms which suit one of the approaches and inhibiting a fair comparison with STM algorithms suiting the other. In this paper, we introduce a technique to implement in-place metadata that does not wrap memory cells, thus overcoming the bias and allowing STM algorithms to directly access the transactional metadata. The proposed technique is available as an extension to Deuce and enables the efficient implementation of a wide range of STM algorithms and their fair (unbiased) comparison in a common STM framework. We illustrate the benefits of our approach by analyzing its impact in two popular transactional memory algorithms with several transactional workloads, TL2 and multiversioning, each befitting out-place and in-place, respectively.

Dias, R. J., J. M. Lourenço, and J. C. Seco, Detection of Snapshot Isolation Anomalies in Software Transactional Memory: A Statical Analysis Approach, , no. UNL-DI-5-2011: Departamento de Informática FCT/UNL, 2011. Abstract

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Dias, R. J., V. Pessanha, and J. M. Lourenço, "Precise Detection of Atomicity Violations", Haifa Verification Conference, Haifa, Israel, Springer Berlin / Heidelberg, Nov 2012. Abstracthvc2012.pdf

Concurrent programs that are free of unsynchronized ac- cesses to shared data may still exhibit unpredictable concurrency errors called atomicity violations, which include both high-level dataraces and stale-value errors. Atomicity violations occur when programmers make wrong assumptions about the atomicity scope of a code block, incorrectly splitting it in two or more atomic blocks and allow them to be interleaved with other atomic blocks. In this paper we propose a novel static analysis algorithm that works on a dependency graph of program variables and detects both high-level dataraces and stale-value errors. The algorithm was implemented for a Java Bytecode analyzer and its effectiveness was evaluated with some well known faulty programs. The results obtained show that our algorithm performs better than previous approaches, achieving higher precision for small and medium sized programs, making it a good basis for a practical tool.

Dias, R. J., D. Distefano, J. C. Seco, and J. M. Lourenço, "Verification of Snapshot Isolation in Transactional Memory Java Programs", Proceedings of the 26th European Conference on Object-Oriented Programming, Beijing, China, 11-16 June, 2012. Abstractecoop12.pdf

This paper presents an automatic verification technique for transactional memory Java programs executing under snapshot isolation level. We certify which transactions in a program are safe to execute under snapshot isolation without triggering the write-skew anomaly, opening the way to run-time optimizations that may lead to considerable performance enhancements. Our work builds on a novel deep-heap analysis technique based on separation logic to statically approximate the read- and write-sets of a transactional memory Java program. We implement our technique and apply our tool to a set of micro benchmarks and also to one benchmark of the STAMP package. We corroborate known results, certifying some of the examples for safe execution under snapshot isolation by proving the absence of write-skew anomalies. In other cases our analysis has identified transactions that potentially trigger previously unknown write-skew anomalies.>