Rodrigo Martins

A high-gain amplifier topology, with all single n-type enhancement transistors, is proposed in this paper. This type of circuits are essential in transparent TFT technologies, such as GIZO and ZnO that lack complementary type transistor. All circuits were simulated using BSIM3V3 model of a 0.35 μm CMOS technology, due to the absence of a complete electrical model for the TFTs. Results reveal that the proposed circuit promise more gain, lower power consumption and higher bandwidth than the existing solutions under identical bias conditions. © 2013 IEEE.

This paper presents analog building blocks that find potential applications in display panels. A buffer (source-follower), subtractor, adder, and high-gain amplifier, employing only n-type enhancement amorphous gallium-indium-zinc-oxide thin-film transistors (a-GIZO TFTs), were designed, simulated, fabricated, and characterized. Circuit simulations were carried out using a neural model developed in-house from the measured characteristics of the transistors. The adder-subtractor circuit presents a power consumption of 0.26 mW, and the amplifier presents a gain of 34 dB and a power consumption of 0.576 mW, with a load of 10 MΩ16 pF. To the authors' knowledge, this is the highest gain reported so far for a single-stage amplifier with a-GIZO TFT technology. © 2015 IEEE.

This paper presents a study concerning the role of channel length scaling on IGZO TFT technology benchmark parameters, which are fabricated at temperatures not exceeding 180\, ^{\circ}C. The parameters under investigation are unity current-gain cutoff frequency, intrinsic voltage-gain, and on-resistance of the bottom-gate IGZO TFTs. As the channel length varies from 160 to 3 μm, the measured cutoff frequency increases from 163 {\rm kHz} to 111.5 {\rm MHz}, which is a superior value compared to the other competing low-temperature thin-film technologies, such as organic TFTs. On the other hand, for the same transistor dimensions, the measured intrinsic voltage-gain is changing from 165 to 5.3 and the on-resistance is decreasing from 1135.6 to 26.1 kØmega. TFTs with smaller channel length (3 μ m) have shown a highly negative turn-on voltage and hump in the subthreshold region, which can be attributed to short channel effects. The results obtained here, together with their interpretation based on device physics, provide crucial information for accurate IC design, enabling an adequate selection of device dimensions to maximize the performance of different circuit building blocks assuring the multifunctionality demanded by system-on-panel concepts. © 2005-2012 IEEE.

This paper presents the results of a preliminary study to examine the ability of post-silicon devices for analog processing. It is focused on the latest thin-film transistors (TFTs) with amorphous gallium-indium-zinc oxide (a-GIZO) as active layer. Three circuit configurations are presented: a differential pair and two multiplier topologies. Both triode and saturation regions of operation are included in the analysis, with the devices set to remain in strong accumulation. A neural model, which is developed based on the measured data of the TFTs, is used for the circuit simulations in the Cadence Virtuoso environment. The analog multipliers simulation results are compared against the expected functional results. © 2012 IEEE.

Transparent TFT technologies, with amorphous semiconductor oxides are lacking a complementary type transistor. This represents a real challenge, when the design of high-gain amplifiers are considered, without resorting to passive resistive elements. However, some solutions do exist to overcome the lack of a p-type transistor. This paper then presents a comparison analysis of two high-gain single-stage amplifier topologies using only n-type enhancement transistors. In these circuits, high gain is achieved using positive feedback for the load impedance. The comparison is carried out in terms of bandwidth, power consumption and complexity under identical bias conditions. Further, the same load impedance is used to develop a novel high-gain multiplier. All the circuits are simulated using a 0.35 μm CMOS technology, as it is easy to test the reliability of the methods, since CMOS transistors have trustworthy models. © 2013 IEEE.

Development time and accuracy are measures that need to be taken into account when devising device models for a new technology. If complex circuits need to be designed immediately, then it is very important to reduce the time taken to realize the model. Solely based on data measurements, artificial neural networks (ANNs) modeling methodologies are capable of capturing small and large signal behavior of the transistor, with good accuracy, thus becoming excellent alternatives to more strenuous modeling approaches, such as physical and semi-empirical. This paper then addresses a static modeling methodology for amorphous Gallium-Indium-Zinc-Oxide - Thin Film Transistor (a-GIZO TFT), with different ANNs, namely: multilayer perceptron (MLP), radial basis functions (RBF) and least squares-support vector machine (LS-SVM). The modeling performance is validated by comparing the model outcome with measured data extracted from a real device. In case of a single transistor modeling and under the same training conditions, all the ANN approaches revealed a very good level of accuracy for large- and small-signal parameters (gm and gd), both in linear and saturation regions. However, in comparison to RBF and LS-SVM, the MLP achieves a very acceptable degree of accuracy with lesser complexity. The impact on simulation time is strongly related with model complexity, revealing that MLP is the most suitable approach for circuit simulations among the three ANNs. Accordingly, MLP is then extended for multiple TFTs with different aspect ratios and the network implemented in Verilog-A to be used with electric simulators. Further, a simple circuit (inverter) is simulated from the developed model and then the simulation outcome is validated with the fabricated circuit response. © 2014 Elsevier Ltd . All rights reserved.

This letter presents a novel high-gain four-quadrant analog multiplier using only n-type enhancement indium- gallium-zinc-oxide thin-film-transistors. The proposed circuit improves the gain by using an active load with positive feedback. A Gilbert cell with a diode-connected load is also presented for comparison purposes. Both circuits were fabricated on glass at low temperature (200 °C) and were successfully characterized at room temperature under normal ambient conditions, with a power supply of 15 V and 4-pF capacitive load. The novel circuit has shown a gain improvement of 7.2 dB over the Gilbert cell with the diode-connected load. Static linearity response, total harmonic distortion, frequency response, and power consumption are reported. This circuit is an important signal processing building block in large-area sensing and readout systems, specially if data communication is involved. © 2016 IEEE.

A novel linear analog adder is proposed only with n-type enhancement IGZO TFTs that computes summation of four voltage signals. However, this design can be easily extended to perform summation of higher number of signals, just by adding a single TFT for each additional signal in the input block. The circuit needs few number of transistors, only a single power supply irrespective of the number of voltage signals to be added, and offers good accuracy over a reasonable range of input values. The circuit was fabricated on glass substrate with the annealing temperature not exceeding 200° C. The circuit performance is characterized from measurements under normal ambient at room temperature, with a power supply voltage of 12 V and a load of ≈ 4 pF. The designed circuit has shown a linearity error of 2.3% (until input signal peak to peak value is 2 V), a power consumption of 78 μW and a bandwidth of ≈ 115 kHz, under the worst case condition (when it is adding four signals with the same frequency). In this test setup, it has been noticed that the second harmonic is 32 dB below the fundamental frequency component. This circuit could offer an economic alternative to the conventional approaches, being an important contribution to increase the functionality of large area flexible electronics. © 2016 IEEE.

This paper addresses a modeling and simulation methodology for analog circuit design with amorphous-GIZO thin-film transistors (TFTs). To reach an effective circuit design flow, with commercially available tools, a TFT model has been first developed with an artificial neural network (ANN). Multilayer perceptron with backpropagation algorithm has been adopted to model the static behavior of the TFT devices, for different aspect ratios. The model was then implemented in Verilog-A, to allow a quick instantiation in circuit. Simulations using Cadence Spectre are performed to validate the model. On a second phase, simulation results of basic analog circuits, with this ANN model, are verified against the actual functional results, namely an adder, subtractor, and current mirror circuit. Results demonstrate not only the ANN model accuracy and compatibility with dc and transient analysis, but also show the a-GIZO TFT capability to perform analog operations. © 2012 IEEE.

This paper characterizes transparent current mirrors with n-type amorphous gallium-indium-zinc-oxide (a-GIZO) thin-film transistors (TFTs). Two-TFT current mirrors with different mirroring ratios and a cascode topology are considered. A neural model is developed based on the measured data of the TFTs and is implemented in Verilog-A; then it is used to simulate the circuits with Cadence Virtuoso Spectre simulator. The simulation outcomes are validated with the fabricated circuit response. These results show that the neural network can model TFT accurately, as well as the current mirroring ability of the TFTs. © 2005-2012 IEEE.

This paper analyzes transparent two-TFT current mirrors using a-GIZO TFTs with different mirroring ratios. In order to achieve a high mirroring ratio, the output TFT in the circuit employed a fingered structure layout to minimize area and overlap capacitance. The analysis of the current mirrors is performed in three phases. In the first, a radial basis function based (RBF) model is developed using measured data from fabricated TFTs on the same chip. Then, in the second phase, the RBF model is implemented in Verilog-A that is used to simulate two-TFT current mirrors with different mirroring ratios. The simulations are carried out using Cadence spectre simulator. In the third phase, simulation results are validated with the measured response from the fabricated circuits. © 2014 IEEE.

This paper presents the characterization of fundamental analog and digital circuits with a-IGZO TFTs from measurements performed at normal ambient. The fundamental blocks considered in this work include digital logic gates, a low-power single stage high-gain amplifier with capcacitive bootstrapping and a level shifter/buffer. These circuits are important functional blocks in analog/Mixed signal IC design with oxide TFTs. Being fabricated at low temperature (< 200 °C), they can find potential applications in low-cost large-area flexible systems. © 2016 IEEE.

This paper presents results of the role of the oxygen concentration (CO) and the deposition pressure (pd) on structural and electrical properties of indium tin oxide films produced by r.f. magnetron sputtering. The films were annealed in air, followed by a reannealed stage in hydrogen, aiming to improve the film's transparency and conductivity. The results achieved show that the films texture grain size, structure and compactness is more influenced by CO than by pd, the same does not happen with the electrical properties.

This work refers to the main electro-optical characteristics exhibited by large area indium tin oxide films (300 × 400 mm) produced by r.f. magnetron sputtering under different oxygen concentrations and deposition pressures. Besides that, the ageing effect on the electro-optical characteristics of the films produced was also analyzed. The results achieved show that the film transparency and conductivity were highly improved (more than four orders of magnitude) by first annealing them in air at 470°C, followed by a reannealed stage under vacuum, in a hydrogen atmosphere, at 350°C. The ageing tests show that film degradation occurs when the films are produced at oxygen concentrations above 10% and/or at deposition pressures above 1.2 × 10-2 mbar. © 1999 Elsevier Science S.A. All rights reserved.

The influence of Ag nanoparticles (Ag NPs) on the luminescence of electrospun nonwoven mats made of polyvinylpyrrolidone (PVP) has been studied in this work. The PVP fibers incorporating 2.1-4.3 nm size Ag NPs show a significant photoluminescence (PL) band between 580 and 640 nm under 325 nm laser excitation. The down conversion luminescence emission is present even after several hours of laser excitation, which denotes the durability and stability of fibers to consecutive excitations. As so these one-dimensional photonic fibers made using cheap methods is of great importance for organic optoelectronic applications, fluorescent clothing or counterfeiting labels. © 2014 Elsevier B.V. All rights reserved.

The present work proposes the development of a bio-battery composed by an ultrathin monolithic structure of an electrospun cellulose acetate membrane, over which was deposited metallic thin film electrodes by thermal evaporation on both surfaces. The electrochemical characterization of the bio-batteries was performed under simulated body fluids like sweat and blood plasma [salt solution - 0.9% (w/w) NaCl]. Reversible electrochemical reactions were detected through the cellulose acetate structure. Thus, a stable electrochemical behavior was achieved for a bio-battery with silver and aluminum thin films as electrodes. This device exhibits the ability to supply a power density higher than 3μWcm-2.Finally, a bio-battery prototype was tested on a sweated skin, demonstrating the potential of applicability of this bio-device as a micropower source. © 2010 Elsevier B.V.

Indium tin oxide (ITO) has been used as the prefered electrode material for the emerging area of transparent electronics, namely for thin-film transistors (TFTs) based on oxide semiconductors. This work pretends to investigate different materials to replace ITO in inverted-staggered TFTs based on gallium-indium-zinc oxide (GIZO), one of the most promissing oxide semiconductors for TFTs. The analyzed electrode materials are indium-zinc oxide (IZO), Ti, Mo and Ti/Au. Devices are analyzed with special focus on the contact resistance fundamentals, including the extraction of source/ drain series resistances and TFTs intrinsic parameters, such as intrinsic mobility (p\) and intrinsic threshold voltage (V Ti). The obtained contact resistance values are between 10 kΩ and 20 kΩ, and the best devices have field effect mobility ((μ FE) close to 25 cm 2/V s and on/off ratio close to 10 8. © 2008 WILEY-VCH Verlag GmbH & Co. KGaA.

Long-term electrical stability measurements, including current/bias stress and aging over 18 months of idle shelf life are presented for GIZO-based TFTs. The effects of oxygen partial pressure, annealing temperature and passivation are discussed. Optimized devices show highly stable properties, such as a recoverable ΔV T<0.5 V after 24h of I D=10 μA stress, quite promising for integration in electronic circuits. © 2010 SID.

This work refers to the electro-optical and structural characteristics of titanium oxide (TiOx) thin films produced by radio frequency (r.f.) magnetron sputtering that present promising performances for gate dielectric applications, alone or in mixed tandem structures, such as with Al yOz films, taking advantage of its high dielectric constant. Films produced with a O2/Ar ratio between 0.1 and 0.15 present an improved stochiometry and density where the resistivity overcomes 1011 Ω cm and the fixed charge density decreases below 10 12 cm-2. The deposition pressure influences greatly the growth rate that seems to be a determinant factor dictating the films properties. © 2004 Elsevier Ltd. All rights reserved.

Insensitivity to light irradiation is desirable for conventional applications of thin-film transistors, i.e., the active matrices of displays. However, if one produces a device presenting controlled sensitivity to light, many other applications can benefit or can even be created. In this work it is shown the influence of the photon energy on the optoelectronic properties presented by n-type bottom-gate thin-film transistors based on indium zinc oxide. In the dark, the devices present very good electrical properties, working in the enhancement mode, exhibiting on-off ratios higher than 107 and channel mobility above 30 cm2/V s. Remarkable results were achieved when the devices were exposed to light radiation, the most striking one is the possibility to switch between enhancement (in the dark) and depletion (illuminated) modes, with different threshold voltages and on/off ratios, function of the light power density and wavelength used. This type of behavior permits to design circuits where one can have the same transistor working either in the enhancement or depletion modes, function of the light beam and intensity impinging on it, highly important for short wavelength detector applications. © 2006 Elsevier B.V. All rights reserved.

During the last years, oxide semiconductors have shown that they will have a key role in the future of electronics. In fact, several research groups have already presented working devices with remarkable electrical and optical properties based on these materials, mainly thin-film transistors (TFTs). Most of these TFTs use indium-tin oxide (ITO) as the material for source/drain electrodes. This paper focuses on the investigation of different materials to replace ITO in inverted-staggered TFTs based on gallium-indium-zinc oxide (GIZO) semiconductor. The analyzed electrode materials were indium-zinc oxide, Ti, Al, Mo, and Ti/Au, with each of these materials used in two different kinds of devices: one was annealed after GIZO channel deposition but prior to source/drain deposition, and the other was annealed at the end of device production. The results show an improvement on the electrical properties when the annealing is performed at the end (for instance, with Ti/Au electrodes, mobility rises from 19 to 25 cm2/V · s, and turn-on voltage drops from 4 to 2 V). Using time-of-flight secondary ion mass spectrometry (TOF-SIMS), we could confirm that some diffusion exists in the source/drain electrodes/ semiconductor interface, which is in close agreement with the obtained electrical properties. In addition to TOF-SIMS results for relevant elements, electrical characterization is presented for each kind of device, including the extraction of source/drain series resistances and TFT intrinsic parameters, such as VTi (intrinsic threshold voltage). © 2008 IEEE.

This work analyzes the role of processing parameters on the electrical performance of GIZO (Ga2 O3: In2 O3:ZnO) films and thin-film transistors (TFTs). Parameters such as oxygen partial pressure, deposition pressure, target composition, thickness, and annealing temperature are studied. Generally, better devices are obtained when low oxygen partial pressure is used. This is related to the damage induced by oxygen ion bombardment and very high film's resistivity when higher oxygen partial pressures are used. Low deposition pressures and targets with richer indium compositions led to films with high carrier concentration, resulting in transistors with field-effect mobility as high as ∼80 cm2 Vs but poor channel conductivity modulation, becoming ineffective as switching devices. Nevertheless, it is demonstrated that reducing the GIZO thickness from 40 to 10 nm greatly enhances the switching behavior of those devices, due to the lower absolute number of free carriers and hence to their easier depletion. Annealing also proves to be crucial to control device performance, significantly modifying GIZO electrical resistivity and promoting local atomic rearrangement, being the optimal temperature determined by the as-produced films' properties. For the best-performing transistors, even with a low annealing temperature (150°C), remarkable properties such as μFE =73.9 cm2 Vs, onoff ratio≈7× 107, VT ≈0.2 V, and S=0.29 Vdec are achieved. © 2008 The Electrochemical Society.

Long-term electrical stability measurements, including current/bias stress and aging over 18 months of idle shelf life are presented for GIZO-based TFTs. The effects of oxygen partial pressure, annealing temperature and passivation are discussed. Optimized devices show highly stable properties, such as a recoverable ΔVT<0.5 V after 24h of 1D=10 μA stress, quite promising for integration in electronic circuits.

Transparent electronics is emerging as one of the most promising technologies for the next generation of electronic products, away from the traditional silicon technology. It is essential for touch display panels, solar cells, LEDs and antistatic coatings. The book describes the concept of transparent electronics, passive and active oxide semiconductors, multicomponent dielectrics and their importance for a new era of novel electronic materials and products. This is followed by a short history of transistors, and how oxides have revolutionized this field. It concludes with a glance at low-cost, disposable and lightweight devices for the next generation of ergonomic and functional discrete devices. Chapters cover: Properties and applications of n-type oxide semiconductors P-type conductors and semiconductors, including copper oxide and tin monoxide Low-temperature processed dielectrics n and p-type thin film transistors (TFTs) - structure, physics and brief history Paper electronics - Paper transistors, paper memories and paper batteries Applications of oxide TFTs - transparent circuits, active matrices for displays and biosensors Written by a team of renowned world experts, Transparent Oxide Electronics: From Materials to Devices gives an overview of the world of transparent electronics, and showcases groundbreaking work on paper transistors. © 2012 John Wiley & Sons, Ltd.

Multicomponent amorphous oxides are starting to emerge as a class of appealing semiconductor materials for application in transparent electronics. In this work, a high performance bottom-gate n-type transparent thin-film transistors are reported, being the discussion primarily focused on the influence of the indium zinc oxide active layer thickness on the properties of the devices. For this purpose, transparent transistors with active layer thicknesses ranging from 15 nm to 60 nm were produced at room temperature using rf magnetron sputtering. Optical transmittance data in the visible range reveals average transmittance higher than 80%, including the glass substrate. The devices work in the enhancement mode and exhibit excellent saturation drain currents. On-off ratios above 107 are achieved, but this value tends to be lower for devices with thicker semiconductor films, as a result of the decrease in the resistance of the channel region with increasing thickness. Channel mobilities are also quite respectable, with some devices presenting values around 40 cm2/V s, even without any annealing or other post-deposition improvement processes. Concerning the evolution of threshold voltage with the thickness, this work shows that it increases from about 3 V in thicker films up to about 10 V in the thinnest ones. The interesting electrical properties obtained and the versatility arising from the fact that it is possible to modify them changing only the thickness of the semiconductor makes this new transparent transistors quite promising for future transparent ICs. © 2006 Elsevier B.V. All rights reserved.