Rodrigo Martins

A novel linear analog adder is proposed only with n-type enhancement IGZO TFTs that computes summation of four voltage signals. However, this design can be easily extended to perform summation of higher number of signals, just by adding a single TFT for each additional signal in the input block. The circuit needs few number of transistors, only a single power supply irrespective of the number of voltage signals to be added, and offers good accuracy over a reasonable range of input values. The circuit was fabricated on glass substrate with the annealing temperature not exceeding 200° C. The circuit performance is characterized from measurements under normal ambient at room temperature, with a power supply voltage of 12 V and a load of ≈ 4 pF. The designed circuit has shown a linearity error of 2.3% (until input signal peak to peak value is 2 V), a power consumption of 78 μW and a bandwidth of ≈ 115 kHz, under the worst case condition (when it is adding four signals with the same frequency). In this test setup, it has been noticed that the second harmonic is 32 dB below the fundamental frequency component. This circuit could offer an economic alternative to the conventional approaches, being an important contribution to increase the functionality of large area flexible electronics. © 2016 IEEE.

This paper addresses a modeling and simulation methodology for analog circuit design with amorphous-GIZO thin-film transistors (TFTs). To reach an effective circuit design flow, with commercially available tools, a TFT model has been first developed with an artificial neural network (ANN). Multilayer perceptron with backpropagation algorithm has been adopted to model the static behavior of the TFT devices, for different aspect ratios. The model was then implemented in Verilog-A, to allow a quick instantiation in circuit. Simulations using Cadence Spectre are performed to validate the model. On a second phase, simulation results of basic analog circuits, with this ANN model, are verified against the actual functional results, namely an adder, subtractor, and current mirror circuit. Results demonstrate not only the ANN model accuracy and compatibility with dc and transient analysis, but also show the a-GIZO TFT capability to perform analog operations. © 2012 IEEE.

This paper characterizes transparent current mirrors with n-type amorphous gallium-indium-zinc-oxide (a-GIZO) thin-film transistors (TFTs). Two-TFT current mirrors with different mirroring ratios and a cascode topology are considered. A neural model is developed based on the measured data of the TFTs and is implemented in Verilog-A; then it is used to simulate the circuits with Cadence Virtuoso Spectre simulator. The simulation outcomes are validated with the fabricated circuit response. These results show that the neural network can model TFT accurately, as well as the current mirroring ability of the TFTs. © 2005-2012 IEEE.

This paper analyzes transparent two-TFT current mirrors using a-GIZO TFTs with different mirroring ratios. In order to achieve a high mirroring ratio, the output TFT in the circuit employed a fingered structure layout to minimize area and overlap capacitance. The analysis of the current mirrors is performed in three phases. In the first, a radial basis function based (RBF) model is developed using measured data from fabricated TFTs on the same chip. Then, in the second phase, the RBF model is implemented in Verilog-A that is used to simulate two-TFT current mirrors with different mirroring ratios. The simulations are carried out using Cadence spectre simulator. In the third phase, simulation results are validated with the measured response from the fabricated circuits. © 2014 IEEE.

This paper presents the characterization of fundamental analog and digital circuits with a-IGZO TFTs from measurements performed at normal ambient. The fundamental blocks considered in this work include digital logic gates, a low-power single stage high-gain amplifier with capcacitive bootstrapping and a level shifter/buffer. These circuits are important functional blocks in analog/Mixed signal IC design with oxide TFTs. Being fabricated at low temperature (< 200 °C), they can find potential applications in low-cost large-area flexible systems. © 2016 IEEE.

A high-gain amplifier topology, with all single n-type enhancement transistors, is proposed in this paper. This type of circuits are essential in transparent TFT technologies, such as GIZO and ZnO that lack complementary type transistor. All circuits were simulated using BSIM3V3 model of a 0.35 μm CMOS technology, due to the absence of a complete electrical model for the TFTs. Results reveal that the proposed circuit promise more gain, lower power consumption and higher bandwidth than the existing solutions under identical bias conditions. © 2013 IEEE.

This paper presents analog building blocks that find potential applications in display panels. A buffer (source-follower), subtractor, adder, and high-gain amplifier, employing only n-type enhancement amorphous gallium-indium-zinc-oxide thin-film transistors (a-GIZO TFTs), were designed, simulated, fabricated, and characterized. Circuit simulations were carried out using a neural model developed in-house from the measured characteristics of the transistors. The adder-subtractor circuit presents a power consumption of 0.26 mW, and the amplifier presents a gain of 34 dB and a power consumption of 0.576 mW, with a load of 10 MΩ16 pF. To the authors' knowledge, this is the highest gain reported so far for a single-stage amplifier with a-GIZO TFT technology. © 2015 IEEE.

This paper presents a study concerning the role of channel length scaling on IGZO TFT technology benchmark parameters, which are fabricated at temperatures not exceeding 180\, ^{\circ}C. The parameters under investigation are unity current-gain cutoff frequency, intrinsic voltage-gain, and on-resistance of the bottom-gate IGZO TFTs. As the channel length varies from 160 to 3 μm, the measured cutoff frequency increases from 163 {\rm kHz} to 111.5 {\rm MHz}, which is a superior value compared to the other competing low-temperature thin-film technologies, such as organic TFTs. On the other hand, for the same transistor dimensions, the measured intrinsic voltage-gain is changing from 165 to 5.3 and the on-resistance is decreasing from 1135.6 to 26.1 kØmega. TFTs with smaller channel length (3 μ m) have shown a highly negative turn-on voltage and hump in the subthreshold region, which can be attributed to short channel effects. The results obtained here, together with their interpretation based on device physics, provide crucial information for accurate IC design, enabling an adequate selection of device dimensions to maximize the performance of different circuit building blocks assuring the multifunctionality demanded by system-on-panel concepts. © 2005-2012 IEEE.

This paper presents the results of a preliminary study to examine the ability of post-silicon devices for analog processing. It is focused on the latest thin-film transistors (TFTs) with amorphous gallium-indium-zinc oxide (a-GIZO) as active layer. Three circuit configurations are presented: a differential pair and two multiplier topologies. Both triode and saturation regions of operation are included in the analysis, with the devices set to remain in strong accumulation. A neural model, which is developed based on the measured data of the TFTs, is used for the circuit simulations in the Cadence Virtuoso environment. The analog multipliers simulation results are compared against the expected functional results. © 2012 IEEE.

Transparent TFT technologies, with amorphous semiconductor oxides are lacking a complementary type transistor. This represents a real challenge, when the design of high-gain amplifiers are considered, without resorting to passive resistive elements. However, some solutions do exist to overcome the lack of a p-type transistor. This paper then presents a comparison analysis of two high-gain single-stage amplifier topologies using only n-type enhancement transistors. In these circuits, high gain is achieved using positive feedback for the load impedance. The comparison is carried out in terms of bandwidth, power consumption and complexity under identical bias conditions. Further, the same load impedance is used to develop a novel high-gain multiplier. All the circuits are simulated using a 0.35 μm CMOS technology, as it is easy to test the reliability of the methods, since CMOS transistors have trustworthy models. © 2013 IEEE.

Development time and accuracy are measures that need to be taken into account when devising device models for a new technology. If complex circuits need to be designed immediately, then it is very important to reduce the time taken to realize the model. Solely based on data measurements, artificial neural networks (ANNs) modeling methodologies are capable of capturing small and large signal behavior of the transistor, with good accuracy, thus becoming excellent alternatives to more strenuous modeling approaches, such as physical and semi-empirical. This paper then addresses a static modeling methodology for amorphous Gallium-Indium-Zinc-Oxide - Thin Film Transistor (a-GIZO TFT), with different ANNs, namely: multilayer perceptron (MLP), radial basis functions (RBF) and least squares-support vector machine (LS-SVM). The modeling performance is validated by comparing the model outcome with measured data extracted from a real device. In case of a single transistor modeling and under the same training conditions, all the ANN approaches revealed a very good level of accuracy for large- and small-signal parameters (gm and gd), both in linear and saturation regions. However, in comparison to RBF and LS-SVM, the MLP achieves a very acceptable degree of accuracy with lesser complexity. The impact on simulation time is strongly related with model complexity, revealing that MLP is the most suitable approach for circuit simulations among the three ANNs. Accordingly, MLP is then extended for multiple TFTs with different aspect ratios and the network implemented in Verilog-A to be used with electric simulators. Further, a simple circuit (inverter) is simulated from the developed model and then the simulation outcome is validated with the fabricated circuit response. © 2014 Elsevier Ltd . All rights reserved.

This letter presents a novel high-gain four-quadrant analog multiplier using only n-type enhancement indium- gallium-zinc-oxide thin-film-transistors. The proposed circuit improves the gain by using an active load with positive feedback. A Gilbert cell with a diode-connected load is also presented for comparison purposes. Both circuits were fabricated on glass at low temperature (200 °C) and were successfully characterized at room temperature under normal ambient conditions, with a power supply of 15 V and 4-pF capacitive load. The novel circuit has shown a gain improvement of 7.2 dB over the Gilbert cell with the diode-connected load. Static linearity response, total harmonic distortion, frequency response, and power consumption are reported. This circuit is an important signal processing building block in large-area sensing and readout systems, specially if data communication is involved. © 2016 IEEE.

This work refers to the main electro-optical characteristics exhibited by large area indium tin oxide films (300 × 400 mm) produced by r.f. magnetron sputtering under different oxygen concentrations and deposition pressures. Besides that, the ageing effect on the electro-optical characteristics of the films produced was also analyzed. The results achieved show that the film transparency and conductivity were highly improved (more than four orders of magnitude) by first annealing them in air at 470°C, followed by a reannealed stage under vacuum, in a hydrogen atmosphere, at 350°C. The ageing tests show that film degradation occurs when the films are produced at oxygen concentrations above 10% and/or at deposition pressures above 1.2 × 10-2 mbar. © 1999 Elsevier Science S.A. All rights reserved.

This paper presents results of the role of the oxygen concentration (CO) and the deposition pressure (pd) on structural and electrical properties of indium tin oxide films produced by r.f. magnetron sputtering. The films were annealed in air, followed by a reannealed stage in hydrogen, aiming to improve the film's transparency and conductivity. The results achieved show that the films texture grain size, structure and compactness is more influenced by CO than by pd, the same does not happen with the electrical properties.

The influence of Ag nanoparticles (Ag NPs) on the luminescence of electrospun nonwoven mats made of polyvinylpyrrolidone (PVP) has been studied in this work. The PVP fibers incorporating 2.1-4.3 nm size Ag NPs show a significant photoluminescence (PL) band between 580 and 640 nm under 325 nm laser excitation. The down conversion luminescence emission is present even after several hours of laser excitation, which denotes the durability and stability of fibers to consecutive excitations. As so these one-dimensional photonic fibers made using cheap methods is of great importance for organic optoelectronic applications, fluorescent clothing or counterfeiting labels. © 2014 Elsevier B.V. All rights reserved.

The present work proposes the development of a bio-battery composed by an ultrathin monolithic structure of an electrospun cellulose acetate membrane, over which was deposited metallic thin film electrodes by thermal evaporation on both surfaces. The electrochemical characterization of the bio-batteries was performed under simulated body fluids like sweat and blood plasma [salt solution - 0.9% (w/w) NaCl]. Reversible electrochemical reactions were detected through the cellulose acetate structure. Thus, a stable electrochemical behavior was achieved for a bio-battery with silver and aluminum thin films as electrodes. This device exhibits the ability to supply a power density higher than 3μWcm-2.Finally, a bio-battery prototype was tested on a sweated skin, demonstrating the potential of applicability of this bio-device as a micropower source. © 2010 Elsevier B.V.

This work shows the effect of the annealing temperature and atmosphere on the properties of r.f. magnetron sputtered indium-zinc oxide (IZO) thin-films of two types: one a conductive film (as-deposited, room temperature) that exhibits a resistivity of 3.5 × 10- 4 Ω cm; the other, a semiconductor film with a resistivity ∼ 102 Ω cm. The annealing temperatures were changed between 125 and 500 °C. Crystallization of the more conductive films was already noticeable at temperatures around 400 °C. Three different annealing atmospheres were used - vacuum, air and oxygen. For the conductive films, only the oxygen atmosphere was critical, leading to an increase of the electrical resistivity of more than one order of magnitude, for temperatures of 250 °C and above. Concerning the semiconductor films, both temperature and atmosphere had a strong effect on the film's properties, and the resistivity of the annealed films was always considerably smaller than the as-deposited films. Finally, some results of the application of these films to transparent TFTs are shown. © 2007 Elsevier B.V. All rights reserved.

The influence of oxygen content, radio-frequency (rf) sputtering power, and postdeposition annealing on the electrical properties of gallium-indium-zinc oxide (GIZO) thin-film transistors (TFTs) is analyzed. Little to no oxygen content in the sputtering chamber is crucial to obtain high-performance devices, even before annealing. In contrast, a high oxygen content and rf power lead, respectively, to unstable/poor performing and depletion mode TFTs before annealing, and mainly for these "nonideal" conditions, annealing proves to be effective to improve device performance/stability and to decrease the performance discrepancy among TFTs processed under different oxygen and rf power conditions. Best TFTs present a field-effect mobility of 46 cm2 / V s, subthreshold swing of 0.26 V/dec, threshold voltage of 0.70 V, and an on/off ratio 108 - 109. These results are a consequence of the optimized processing and of the usage of proper GIZO target composition, 1:2:1 mol. © 2008 The Electrochemical Society.

High performance transparent thin-film transistors deposited on glass substrates and entirely processed at a low temperature not exceeding 150°C are presented and analyzed in this paper. Besides being based on an amorphous oxide semiconductor, the main innovation of this work relies on the use of sputtered multicomponent oxides as dielectric materials based on mixtures of Ta2O5 with SiO2 or Al2O3. These multicomponent dielectrics allow to obtain amorphous structures and low leakage currents while preserving a high dielectric constant. This results in transistors with remarkable electrical properties, such as field-effect mobility exceeding 35 cm2 V-1 s-1, close to 0 V turn-on voltage, on/off ratio higher than 106, and a subthreshold slope of 0.24 V decade-1, obtained with a Ta2O5: SiO2 dielectric. When subjected to severe current stress tests, optimized devices show little and reversible variation in their electrical characteristics. The devices presented here have properties comparable to the ones using plasma-enhanced chemical vapor deposited SiO2 at 400°C, reinforcing the success of this amorphous multicomponent dielectric approach for low temperature, high performance, and transparent electronic circuits. © 2009 The Electrochemical Society.

This paper discusses the properties of sputtered multicomponent amorphous dielectrics based on mixtures of high-κ and high-bandgap materials and their integration in oxide TFTs, with processing temperatures not exceeding 1 50° C. Even if Ta2O5 films are already amorphous, multicomponent materials such as Ta2O5-SiO2 and Ta2O5-Al2O3 allow an increase in the bandgap and the smoothness of the films, reducing their leakage current and improving (in the case of Ta2O5-SiO2)the dielectric/semiconductor interface properties when these dielectrics are integrated in TFTs. For HfO2- based dielectrics, the advantages of multicomponent materials are even clearer: while HfO2 films present a polycrystalline structure and a rough surface, HfO2-SiO2 films exhibit an amorphous structure and a very smooth surface. The integration of the multicomponent dielectrics in GIZO TFTs allows remarkable performance, comparable with that of GIZO TFTs using SiO2 deposited at 400°C by PECVD. For instance, with Ta2O5-SiO2 as the dielectric layer, field-effect mobility of 35 cm2/(V-sec), close to 0 V turn-on voltage, an on/off ratio higher than 106, a subthreshold slope of 0.24 V/dec, and a small/recoverable threshold voltage shifts under constant current (ID = 10 μ,A) stress during 24 hours are achieved. Initial results with multilayers of SiO2/HfO 2-SiO2/SiO2 are also shown, allowing a lower leakage current with lower thickness and excellent device performance. © Copyright 2010 Society for Information Display.

In this work we present a study concerning the influence of some of the most important external factors on the electrical properties of transparent thin-film transistors (TFTs), using zinc oxide produced at room temperature as the semiconductor material. Electrical characterization performed sixteen months after the production of the devices showed a decrease in the on/off ratio from 8×105 to 1×105, mainly due to the increase of the off-current. We also observed a small increase in the saturation mobility, a decrease in the threshold voltage and an increase in the gate voltage swing (by factors of about 1.2, 0.9 and 1.6, respectively). Exposure to ambient light does not have a noticeable effect on the electrical properties, which is an important point as regards the application of these devices in active matrix displays. Some variation of the electrical properties was only detectable under intense white light radiation. In order to evaluate the temperature effect on the TFTs, they were also characterized at 90 °C. At this temperature we noticed that the off-current increased more than two times, and the other electrical properties had a small variation, returning to their initial values after cooling, meaning that the process is totally reversible. © 2005 Elsevier Ltd. All rights reserved.

This chapter gives an overview about GIZO TFTs, comprising an introductory section about generic TFT structure and operation, different semiconductor technologies for TFTs - with special emphasis on AOSs and particularly on GIZO - and then some experimental results obtained for GIZO TFTs fabricated in CENIMAT. Thin-film transistors (TFTs) are important electronic devices which are predominantly used as On/Off switches in active matrix backplanes of flat panel displays (FPDs), namely liquid crystal displays (LCDs) and organic light emitting device (OLED) displays. Even if a-Si:H is still dominating the TFT market in terms of semiconductor technology, oxide semiconductors are emerging as one of the most promising alternatives for the next generation of TFTs, bringing the possibility of having fully transparent devices, low processing temperature, low cost, high performance and electrically stable properties [1, 2]. Amorphous oxide semiconductors (AOS) such as Gallium-Indium-Zinc oxide (GIZO) [3, 4], even if fabricated at temperatures below 150°, are currently capable of providing transistors with field-effect mobility (μFE) exceeding 20 cm2V-1 s-1, threshold voltage (VT) close to 0V, On/Off ratios above 108, subthreshold swing (S) around 0:20V dec-1 and fully recoverable VT shift (ΔVT) lower than 0.5V after 24 h stress with constant drain current of 10 μA. © Springer-Verlag Berlin Heidelberg 2012.

The purpose of this work is to present in-depth electrical characterization on transparent TFTs, using zinc oxide produced at room temperature as the semiconductor material. Some of the studied aspects were the relation between the output conductance in the post-pinch-off regime and width-to-length ratios, the gate leakage current, the semiconductor/insulator interface traps density and its relation with threshold voltage. The main point of the analysis was focused on channel mobility. Values extracted using different methodologies, like effective, saturation and average mobility, are presented and discussed regarding their significance and validity. The evolution of the different types of mobility with the applied gate voltage was investigated and the obtained results are somehow in disagreement with the typical behavior found on classical silicon based MOSFETs, which is mainly attributed to the completely different structures of the semiconductor materials used in the two situations: while in MOSFETS we have monocrystalline silicon, our transparent TFTs use poly/nanocrystalline zinc oxide with grain sizes of about 10 nm.

Indium tin oxide (ITO) has been used as the prefered electrode material for the emerging area of transparent electronics, namely for thin-film transistors (TFTs) based on oxide semiconductors. This work pretends to investigate different materials to replace ITO in inverted-staggered TFTs based on gallium-indium-zinc oxide (GIZO), one of the most promissing oxide semiconductors for TFTs. The analyzed electrode materials are indium-zinc oxide (IZO), Ti, Mo and Ti/Au. Devices are analyzed with special focus on the contact resistance fundamentals, including the extraction of source/ drain series resistances and TFTs intrinsic parameters, such as intrinsic mobility (p\) and intrinsic threshold voltage (V Ti). The obtained contact resistance values are between 10 kΩ and 20 kΩ, and the best devices have field effect mobility ((μ FE) close to 25 cm 2/V s and on/off ratio close to 10 8. © 2008 WILEY-VCH Verlag GmbH & Co. KGaA.