Pina, J. M., P. Pereira, A. Pronto, P. Arsénio, and T. Silva,
"Modelling and Simulation of Inductive Fault Current Limiters",
Physics Procedia, vol. 36, pp. 1248 - 1253, 2012.
AbstractInductive superconducting fault current limiters have already demonstrated their technical viability in electrical networks. Its architecture and robustness make them potentially adequate for distribution networks, and this type of devices is considered as an enabling technology for the advent of embedded generation with renewable energy sources. In order to promote the growth and maturity of these superconducting technologies, fast design tools must be developed, allowing simulating devices with different materials in grids with diverse characteristics. This work presents advances in the development of such tool, which, at present stage, is an effective alternative to software simulations by finite elements methods, reducing dramatically computation time. The algorithms are now compared with experimental results from a laboratory scale prototype, showing the need to refine them.
Pina, J. M., P. Pereira, D. Valadas, J. M. Ceballos, and A. Alvarez,
"Sand Pile Modeling of Multiseeded HTS Bulk Superconductors: Current Densities Identification by Genetic Algorithms",
IEEE Transactions on Applied Superconductivity, vol. 23, issue 3, pp. 8000804 - 8000804, June, 2013.
AbstractThe sand pile model, in conjunction with Bean model, is often applied to describe single grain bulk superconductors. However, in several applications such as electric motors, multiseeded bulks are needed, due to the need to increase sample dimensions. In this paper, an extension of the sand pile model is presented in order to manage this type of materials. Multiseeded HTS bulk superconductors, produced, e.g., by the top-seeded melt growth process, are characterized by intra- and intergrain currents, and these are reflected in the model. However, identifying these currents from flux density measurements is not straightforward, when considering more than one grain. In fact, the number of currents increases with the number of grains, and these have to be identified from the measured field surface. A method to identify these currents based on genetic algorithms is validated with artificial data and then used in real measurements.
Pina, J. M., D. Inacio, G. Luis, J. M. Ceballos, P. Pereira, J. Martins, M. Ventim-Neves, A. Alvarez, and A. L. Rodrigues,
"Research and Development of Alternative Concepts in HTS Machines",
Applied Superconductivity, IEEE Transactions on, vol. 21, no. 3, pp. 1141 -1145, june, 2011.
AbstractHigh temperature superconducting (HTS) machines are recognized to offer several advantageous features when comparing to conventional ones. Amongst these, highlights the decrease in weight and volume of the machines, due to increased current density in conductors or the absence of iron slots' teeth; or the decrease in AC losses and consequent higher efficiency of the machines, even accounting for cryogenics. These concepts have been already demonstrated and some machines have even achieved commercial stage. In this paper, several alternative approaches are applied to electrical motors employing HTS materials. The first one is an all superconducting linear motor, where copper conductors and permanent magnets are replaced by Bi-2223 windings and trapped flux magnets, taking advantage of stable levitation due to flux pinning, higher current densities and higher excitation field. The second is an induction disk motor with Bi-2223 armature, where iron, ironless and hybrid approaches are compared. Finally, an innovative command strategy, consisting of an electronically variable pole pairs' number approach, is applied to a superconducting hysteresis disk motor. All these concepts are being investigated and simulation and experimental results are presented.
Pina, J., P. Pereira, S. Valtchev, A. Gonçalves, V. M. Neves, A. Alvarez, and L. Rodrigues,
"A test rig for thrust force measurements of an all HTS linear synchronous motor",
Journal of Physics: Conference Series, vol. 97, no. 1, pp. 012220, 2008.
AbstractThis paper presents the design of a test rig for an all HTS linear synchronous motor. Although this motor showed to have several unattractive characteristics, its design raised a number of problems which must be considered in future HTS machines design. HTS electromagnetic properties led to the development of new paradigms in electrical machines and power systems, as e. g. in some cases iron removal and consequent assembly of lighter devices. This is due to superconductor's ability to carry high currents with minimum losses and consequent generation in the surrounding air of flux densities much higher than the allowed by ferromagnetic saturation. However, severe restrictions in HTS power devices design that goes further beyond cryogenic considerations must be accounted in. This is usually the case when BSCCO tapes are used as conductors. Its bending limitations and the presence of flux components perpendicular to tape surface, due to the absence of iron, have to be considered for it may turn some possible applications not so attractive or even practically unfeasible. An all HTS linear synchronous motor built by BSCCO tapes as armature conductors and two trapped-flux YBCO bulks in the mover was constructed and thrust force measurements are starting to be performed. Although the device presents severe restrictions due to the exposed and other reasons, it allowed systematising its design. A pulsed-field magnetiser to generate opposite fluxes for both YBCO bulks is also detailed. Thrust force numerical predictions were already derived and presented.
Pereira, P., M. Kotti, H. Fino, and M. Fakhfakh,
"Metaheuristic algorithms comparison for the LC - Voltage controlled oscillators optimal design",
5th International Conference on Modeling, Simulation and Applied Optimization (ICMSAO), Hammamet, Tunisia, pp. 1 - 6, 28-30 April 2013.
AbstractThe goal of this paper is to present a comparison among three known metaheuristics: Genetic Algorithm (GA), Particle Swarm Optimization (PSO) and Simulated Annealing (SA). For the comparison, the design of an LC - Voltage Controlled Oscillator (LC-VCO) is considered, where the minimization of both VCO phase noise and power consumption is envisaged. The objective of this comparison is to find the algorithm yielding the best solution. The validity of the solution obtained with each metaheuristic algorithm is checked against HSPICE/RF simulation results. Robustness checks for each algorithm are presented at the end of this paper.
Pereira, P., and J. Martins,
"Sustainable Heritage Management Towards Mass Tourism Impact: the HERIT-DATA project",
9th International Conference on Intelligent Systems IS’18, Madeira - PT, IEEE, 25-27 Sep., 2018.
AbstractAlthough tourism is a major engine of economic growth, it also creates a burden hard to manage, and has a great impact on the conservation of the heritage. The HERIT-DATA project aims to reduce the impact of human activities, related to tourism, on cultural heritage, with a special focus on two kind of cultural destinations that can benefit from and be affected by mass tourism: Old towns and places of specific cultural heritage or archaeological interest for visitors, including UNESCO World Heritage Sites. In that framework, HERIT-DATA plans to develop of a sustainable and responsible tourism management towards cultural heritage in MED regions, in particular by taking advantage of technology and innovation in management tools (Smart Cities), as well as other policy and social measures.
Pereira, P., H. Fino, and M. Ventim-Neves,
"RF Varactor Design Based on Evolutionary Algorithms",
Mixed Design of Integrated Circuits and Systems (MIXDES), 2012 Proceedings of the 19th International Conference, Warsaw, Poland, pp. 277 -282, may, 2012.
AbstractThis paper introduces an optimization methodology for the design of RF varactors. The characterization of the varactor behaviour is supported by a set of equations based on technological parameters, granting the accuracy of the results, as well as the adaptability of the model to any technology. The varactor design is achieved through the implementation of a Genetic Algorithms (GA) optimization methodology, which is able to deal with continuous and/or discrete variables, making possible to suit both technological and layout constraints. A set of working examples for UMC130 technology are addressed. The results presented, spotlight the potential of varactor analytical model, combined with a GA optimization procedure, when integrated in optimization design tools. The accuracy of the results is checked against HSPICE simulator.
Pereira, P., S. Valtchev, J. Pina, A. Gonçalves, V. M. Neves, and A. L. Rodrigues,
"Power electronics performance in cryogenic environment: evaluation for use in HTS power devices",
Journal of Physics: Conference Series, vol. 97, no. 1, pp. 012219, 2008.
AbstractPower electronics (PE) plays a major role in electrical devices and systems, namely in electromechanical drives, in motor and generator controllers, and in power grids, including high-voltage DC (HVDC) power transmission. PE is also used in devices for the protection against grid disturbances, like voltage sags or power breakdowns. To cope with these disturbances, back-up energy storage devices are used, like uninterruptible power supplies (UPS) and flywheels. Some of these devices may use superconductivity. Commercial PE semiconductor devices (power diodes, power MOSFETs, IGBTs, power Darlington transistors and others) are rarely (or never) experimented for cryogenic temperatures, even when designed for military applications. This means that its integration with HTS power devices is usually done in the hot environment, raising several implementation restrictions. These reasons led to the natural desire of characterising PE under extreme conditions, e. g. at liquid nitrogen temperatures, for use in HTS devices. Some researchers expect that cryogenic temperatures may increase power electronics' performance when compared with room-temperature operation, namely reducing conduction losses and switching time. Also the overall system efficiency may increase due to improved properties of semiconductor materials at low temperatures, reduced losses, and removal of dissipation elements. In this work, steady state operation of commercial PE semiconductors and devices were investigated at liquid nitrogen and room temperatures. Performances in cryogenic and room temperatures are compared. Results help to decide which environment is to be used for different power HTS applications.
Pereira, P., M. Helena Fino, and M. Ventim-Neves,
"Optimal LC-VCO design through evolutionary algorithms",
Analog Integrated Circuits and Signal Processing, vol. 78, issue 1: Springer US, pp. 99-109, 2014.
AbstractThe need for implementing low cost, fully integrated RF wireless transceivers has motivated the widespread use CMOS technology. However, in the particular case for voltage-controlled oscillators (VCO) where ever more stringent specifications in terms of phase-noise must be attained, the design of the on-chip LC tank is a challenging task, where fully advantage of the actual technologies characteristics must be pushed to nearly its limits. To overcome phase-noise limitations arising from the low quality factor of integrated inductors, optimization design methodologies are usually used. In this paper a model-based optimization approach is proposed. In this work the characterization of the oscillator behaviour is guaranteed by a set of analytical models describing each circuit element performance. A set of working examples for UMC130 technology, aiming the minimization of both VCO phase noise and power consumption, is addressed. The results presented, illustrate the potential of a GA optimization procedure design methodology yielding accurate and timely efficient oscillator designs. The validity of the results is checked against HSPICE/RF simulations.
Pereira, P., M. Helena Fino, F. Coito, and M. Ventim-Neves,
"RF integrated inductor modeling and its application to optimization-based design",
Analog Integrated Circuits and Signal Processing, vol. 73, issue 1: Springer Netherlands, pp. 47-55, 2011.
AbstractIn this paper an optimization-based approach for the design of RF integrated inductors is addressed. For the characterisation of the inductor behaviour the double pi-model is used. The use of this model is twofold. On one hand it enables the generation of the inductor characterisation in a few seconds. On the other hand its integration into the optimization procedure is straightforward. For the evaluation of the model element values analytical expressions based on technology parameters as well as on the device geometric characteristics are used. The use of a technology-based methodology for the evaluation of the model parameters grants the adaptability of the model to any technology. The inductor analytical characterization is integrated into an optimization-based tool for the automatic design of RF integrated inductors. This tool uses a modified genetic algorithm (MGA) optimization procedure, which has proved its validation in previous work. Due to the design parameter constraints nature as well as the topology constraints, discrete variables optimization techniques are used. The accuracy of the results is checked against a non-commercial software.
Pereira, P., A. Sallem, M. Fakhfakh, M. H. Fino, and F. Coito,
"A Technology-Aware Optimization of RF Integrated Inductors",
Analog Circuits: Applications, Design and Performance: Nova Science Publishers, Inc., pp. 213-234, February, 2012.
AbstractThis Chapter presents the optimal design of radio-frequency integrated spiral inductors. The basic idea is to generate an analytical model to characterize integrated inductors based on the double {\ensuremathπ}-model, and offer to the designer an approach to determine the inductor layout parameters. Particle Swarm Optimization technique is used to generate optimal values of parameters of the developed models. Viability of the proposed models is highlighted via comparison with ASITIC simulation results.
Pereira, P., F. Passos, and H. M. Fino,
"Optimization-Based Design of RF-VCOs with Tapered Inductors",
Performance Optimization Techniques in Analog, Mixed-Signal, and Radio-Frequency Circuit Design, Hershey, PA, USA, IGI Global, pp. 134 - 157, 2015.
AbstractVoltage-Controlled Oscillators (VCOs) are widely used in wireless transceivers. Due to the stringent specifications regarding phase-noise, LC-VCOs are usually adopted. The need for maximizing phase-noise as well as minimizing the power consumption makes imperious the adoption of optimization-based design methodologies. For the optimization of the LC-VCO characteristics, special attention must be paid to the integrated inductor design, since its quality factor may have a strong influence in the LC-VCO phase-noise. Furthermore, designers must ensure that the higher limit of VCO operating frequency is sufficiently below the inductor resonant frequency. In this chapter, a study on the influence of the quality factor of the inductors on the LC-VCO overall behavior is presented. Then, optimization of integrated inductors by exploring the inductor geometric layout is presented. Finally, results obtained for the design of an LC-VCO in 130nm Technology using a previously optimized inductor are presented.
Pereira, P., H. Fino, M. Fakhfakh, F. Coito, and M. Ventim-Neves,
"LC-VCO Design Challenges in the Nano-Era",
Analog/RF and Mixed-Signal Circuit Systematic Design, vol. 233: Springer Berlin Heidelberg, pp. 363-379, 2013.
AbstractThe progressive scaling of CMOS technology towards nanometre sizes has made the implementation of highly integrated systems for the wireless communication systems possible. Additionally, higher speed, lower power consumption and area reduction has been reached. Due to the high-density integration needs, as well as to low cost fabrication, RF applications, such as the LC-voltage controlled oscillator (LC-VCO), are usually implemented in CMOS technology. The complexity of designing LC-VCOs has lead to the development of several design methodologies. This chapter introduces an optimization based methodology for the design of LC-VCOs, where its efficiency is granted by the use of analytical models to characterize the active and passive elements’ behaviour.
Pereira, P., H. Fino, and M. Ventim-Neves,
"LC-VCO design methodology based on evolutionary algorithms",
Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2012 International Conference on, Seville - Spain, pp. 189 - 192, 2012/sept..
AbstractIn his paper the design of LC-VCOs is addressed. Due to the high-density integration needs as well as to low cost fabrication, RF applications are usually implemented in CMOS technology. However, this technology development brought up several issues such as the degradation of on-chip LC tank quality factor, yielding VCO's phase noise limitation. To overcome phase-noise limitations, optimization design methodologies are usually used. Since electromagnetic simulations are timely expensive, model based approaches are needed. In this work the characterization of the oscillator behaviour is guaranteed by a set of analytical models describing each circuit element performance. A set of working examples for UMC130 technology, aiming the VCO phase noise and power consumption optimization, is addressed. The results presented, spotlight the potential of the proposed design methodology, combined with a GA optimization procedure, for an accurate and timely efficient oscillator design. The accuracy of the results is checked against HSPICE/RF simulator.
Pereira, P., and M. H. Fino,
"Delay Propagation of a CMOS Inverter Using the Nexp Transistor Model",
XXII Conference on Design of Circuits and Integrated Systems, pp. 12–16, November, 2007.
AbstractThis paper presents an analytical model for the delay propagation of a CMOS Invert circuit. In this paper the Nexp transistor model is considered as a way of granting the accuracy of results in the characterization of submicron CMOS circuits. The analytical model proposed is valid for a ramp input, and takes into account all the operation regions of the transistor and take into account the influence of the gate-to-drain capacitance. An application example considering the use of the model for the evaluation of the delay associated to the CMOS inverter is considered. The validity of the results obtained with analytical model of a 1.8V SMIC018 CMOS inverter is checked against Hspice simulation of the circuit.