Pedro Pereira

Abstract This paper proposes a hybrid methodology for the evaluation of integrated inductors sensitivity against technological/geometrical parameters variation. The obtained results are used in an optimization-based design environment for integrated inductors, as a way of guaranteeing that obtained solutions are robust against parameter variation. For the inductor characterization, a lumped element model is used, where each element value is evaluated through physics based equations. The sensitivity of the inductor characterization to parameter variations is evaluated at two levels. At the physical level, the sensitivity of the model element values to technological/geometrical parameters variations is computed through an equation-based strategy. Then, the sensitivity of the inductor characterization to the model parameter variations is obtained through a simulation-based approach, where the Richardson extrapolation technique is used for the calculation of the partial derivatives. Several examples considering the evaluation of sensitivity of both inductance and quality factor of two inductors in \{UMC130\} technology are presented. Obtained results are compared against Monte-Carlo simulations.

In this paper we deal with analog active filter design using discrete components taking into consideration tolerance effects. Sensitivity analysis is performed to determine the most influential components in the considered circuit, thus relative higher precision is offered to those parameters. Further, an in-loop optimization technique is considered, thus actual IC models are handled. An application example is presented. HSpice simulation results, supported by Monte Carlo analysis, are given to highlight efficiency of the proposed selection technique.

The key step of the analog active filter design is the optimal selection of component values due to manufactured series (E12, E24, E48, E96 and E192). In this paper, four simulation-based metaheuristics are applied to optimize four active filters using commercials available ICs as building blocks. The emphasis of this work is applying Richardson extrapolation-based sensitivity analysis in the optimization process of analog active filters. Indeed, Richardson extrapolation technique facilitates the calculation of the partial derivatives for the sensitivity using the simulation-based evaluation, without an explicit mathematical expression. Viability and benefits of the sensitivity analysis are highlighted. Monte Carlo analysis is performed in order to investigate robustness of the proposed sensitivity analysis of the active filters in case of component value variations due to specified tolerances of manufactured series.

In this paper, an innovative approach for monitoring home electric power quality indicators is presented. Using an electric power analysis device (for this work purpose it will be a smart-meter) and a personal computer it is proved that it is possible to monitor and register electric power quality anomalies, such as long interruptions, voltage dips/swells and frequency oscillations. Through an application developed in Java, a user can view real-time electric parameters, check for electric power quality anomalies and assess load diagram of previous days. Experimental results regarding the application performance are also presented with the respective conclusions.

This paper presents the design of a test rig for an all HTS linear synchronous motor. Although this motor showed to have several unattractive characteristics, its design raised a number of problems which must be considered in future HTS machines design. HTS electromagnetic properties led to the development of new paradigms in electrical machines and power systems, as e. g. in some cases iron removal and consequent assembly of lighter devices. This is due to superconductor's ability to carry high currents with minimum losses and consequent generation in the surrounding air of flux densities much higher than the allowed by ferromagnetic saturation. However, severe restrictions in HTS power devices design that goes further beyond cryogenic considerations must be accounted in. This is usually the case when BSCCO tapes are used as conductors. Its bending limitations and the presence of flux components perpendicular to tape surface, due to the absence of iron, have to be considered for it may turn some possible applications not so attractive or even practically unfeasible. An all HTS linear synchronous motor built by BSCCO tapes as armature conductors and two trapped-flux YBCO bulks in the mover was constructed and thrust force measurements are starting to be performed. Although the device presents severe restrictions due to the exposed and other reasons, it allowed systematising its design. A pulsed-field magnetiser to generate opposite fluxes for both YBCO bulks is also detailed. Thrust force numerical predictions were already derived and presented.

Inductive superconducting fault current limiters have already demonstrated their technical viability in electrical networks. Its architecture and robustness make them potentially adequate for distribution networks, and this type of devices is considered as an enabling technology for the advent of embedded generation with renewable energy sources. In order to promote the growth and maturity of these superconducting technologies, fast design tools must be developed, allowing simulating devices with different materials in grids with diverse characteristics. This work presents advances in the development of such tool, which, at present stage, is an effective alternative to software simulations by finite elements methods, reducing dramatically computation time. The algorithms are now compared with experimental results from a laboratory scale prototype, showing the need to refine them.

The sand pile model, in conjunction with Bean model, is often applied to describe single grain bulk superconductors. However, in several applications such as electric motors, multiseeded bulks are needed, due to the need to increase sample dimensions. In this paper, an extension of the sand pile model is presented in order to manage this type of materials. Multiseeded HTS bulk superconductors, produced, e.g., by the top-seeded melt growth process, are characterized by intra- and intergrain currents, and these are reflected in the model. However, identifying these currents from flux density measurements is not straightforward, when considering more than one grain. In fact, the number of currents increases with the number of grains, and these have to be identified from the measured field surface. A method to identify these currents based on genetic algorithms is validated with artificial data and then used in real measurements.

High temperature superconducting (HTS) machines are recognized to offer several advantageous features when comparing to conventional ones. Amongst these, highlights the decrease in weight and volume of the machines, due to increased current density in conductors or the absence of iron slots' teeth; or the decrease in AC losses and consequent higher efficiency of the machines, even accounting for cryogenics. These concepts have been already demonstrated and some machines have even achieved commercial stage. In this paper, several alternative approaches are applied to electrical motors employing HTS materials. The first one is an all superconducting linear motor, where copper conductors and permanent magnets are replaced by Bi-2223 windings and trapped flux magnets, taking advantage of stable levitation due to flux pinning, higher current densities and higher excitation field. The second is an induction disk motor with Bi-2223 armature, where iron, ironless and hybrid approaches are compared. Finally, an innovative command strategy, consisting of an electronically variable pole pairs' number approach, is applied to a superconducting hysteresis disk motor. All these concepts are being investigated and simulation and experimental results are presented.

This paper presents an analytical model for the delay propagation of a CMOS Invert circuit. In this paper the Nexp transistor model is considered as a way of granting the accuracy of results in the characterization of submicron CMOS circuits. The analytical model proposed is valid for a ramp input, and takes into account all the operation regions of the transistor and take into account the influence of the gate-to-drain capacitance. An application example considering the use of the model for the evaluation of the delay associated to the CMOS inverter is considered. The validity of the results obtained with analytical model of a 1.8V SMIC018 CMOS inverter is checked against Hspice simulation of the circuit.

This paper introduces a tool for the optimization of CMOS integrated spiral inductors. Its aim is to offer designers a first approach on designing inductors without the need for fabrication. The core of the tool is an optimization procedure where technology constraints on the inductor layout parameters are considered by applying user-defined discretization on the design variables. User-defined constraints between layout parameters may also be accounted for, as a way of taking into account design heuristics. For those cases where the device area is a major concern area minimization may be considered. On the other hand, if a major design goal is the inductor quality factor the tool may yield the layout parameters which maximize the quality factor. The trade-off between quality factor and device area is evaluated through the generation of a graphical representation of quality factor versus output diameter for a given inductance. For the sake of simplicity the pi-model has been used for characterising the inductor. The application was developed in Matlab and the optimization toolbox is used. The validity of the design results obtained is checked against circuit simulation with ASITIC.

The goal of this paper is to present a comparison among three known metaheuristics: Genetic Algorithm (GA), Particle Swarm Optimization (PSO) and Simulated Annealing (SA). For the comparison, the design of an LC - Voltage Controlled Oscillator (LC-VCO) is considered, where the minimization of both VCO phase noise and power consumption is envisaged. The objective of this comparison is to find the algorithm yielding the best solution. The validity of the solution obtained with each metaheuristic algorithm is checked against HSPICE/RF simulation results. Robustness checks for each algorithm are presented at the end of this paper.

Although tourism is a major engine of economic growth, it also creates a burden hard to manage, and has a great impact on the conservation of the heritage. The HERIT-DATA project aims to reduce the impact of human activities, related to tourism, on cultural heritage, with a special focus on two kind of cultural destinations that can benefit from and be affected by mass tourism: Old towns and places of specific cultural heritage or archaeological interest for visitors, including UNESCO World Heritage Sites. In that framework, HERIT-DATA plans to develop of a sustainable and responsible tourism management towards cultural heritage in MED regions, in particular by taking advantage of technology and innovation in management tools (Smart Cities), as well as other policy and social measures.

This paper introduces an optimization methodology for the design of RF varactors. The characterization of the varactor behaviour is supported by a set of equations based on technological parameters, granting the accuracy of the results, as well as the adaptability of the model to any technology. The varactor design is achieved through the implementation of a Genetic Algorithms (GA) optimization methodology, which is able to deal with continuous and/or discrete variables, making possible to suit both technological and layout constraints. A set of working examples for UMC130 technology are addressed. The results presented, spotlight the potential of varactor analytical model, combined with a GA optimization procedure, when integrated in optimization design tools. The accuracy of the results is checked against HSPICE simulator.

Power electronics (PE) plays a major role in electrical devices and systems, namely in electromechanical drives, in motor and generator controllers, and in power grids, including high-voltage DC (HVDC) power transmission. PE is also used in devices for the protection against grid disturbances, like voltage sags or power breakdowns. To cope with these disturbances, back-up energy storage devices are used, like uninterruptible power supplies (UPS) and flywheels. Some of these devices may use superconductivity. Commercial PE semiconductor devices (power diodes, power MOSFETs, IGBTs, power Darlington transistors and others) are rarely (or never) experimented for cryogenic temperatures, even when designed for military applications. This means that its integration with HTS power devices is usually done in the hot environment, raising several implementation restrictions. These reasons led to the natural desire of characterising PE under extreme conditions, e. g. at liquid nitrogen temperatures, for use in HTS devices. Some researchers expect that cryogenic temperatures may increase power electronics' performance when compared with room-temperature operation, namely reducing conduction losses and switching time. Also the overall system efficiency may increase due to improved properties of semiconductor materials at low temperatures, reduced losses, and removal of dissipation elements. In this work, steady state operation of commercial PE semiconductors and devices were investigated at liquid nitrogen and room temperatures. Performances in cryogenic and room temperatures are compared. Results help to decide which environment is to be used for different power HTS applications.

In this paper a discrete-variable optimization methodology for the automatic design of CMOS integrated spiral inductors is introduced. The use of discrete variable optimization procedure offers the designer the possibility for exploring the design space exclusively in those points available for the technology under use. Further user-defined constraints between layout parameters may also be incorporated as a way of taking into account design heuristics. A comparison between using discrete-variable optimization and a continuous optimization procedure followed by a discretization of the results is presented, where the benefits of the proposed methodology are presented. An application using the proposed methodology was developed in Matlab and the optimization toolbox is used. For the sake of simplicity the pi-model has been used for characterizing the inductor. The validity of the design results is checked against circuit simulation with ASITIC.

This paper addresses the automatic generation of RF integrated inductors model. In this work the double p-model is used as a way of characterizing the inductor behaviour over a frequency range beyond the self-resonant value. For the evaluation of the model element values analytical expressions based on technology parameters as well as on the device geometric characteristics are used. The use of a technology-based methodology for the evaluation of the model parameters grants the adaptability of the models generated to any technology. The inductor analytical characterization is integrated into an optimization-based tool for the automatic design of RF integrated inductors. This tool uses a Genetic Algorithm (GA) optimization procedure, where user defined constraints on the design parameters are taken into account. Due to the design constraints nature and topology constraints, discrete variables optimization techniques are used.

The need for implementing low cost, fully integrated RF wireless transceivers has motivated the widespread use CMOS technology. However, in the particular case for voltage-controlled oscillators (VCO) where ever more stringent specifications in terms of phase-noise must be attained, the design of the on-chip LC tank is a challenging task, where fully advantage of the actual technologies characteristics must be pushed to nearly its limits. To overcome phase-noise limitations arising from the low quality factor of integrated inductors, optimization design methodologies are usually used. In this paper a model-based optimization approach is proposed. In this work the characterization of the oscillator behaviour is guaranteed by a set of analytical models describing each circuit element performance. A set of working examples for UMC130 technology, aiming the minimization of both VCO phase noise and power consumption, is addressed. The results presented, illustrate the potential of a GA optimization procedure design methodology yielding accurate and timely efficient oscillator designs. The validity of the results is checked against HSPICE/RF simulations.

In this paper an optimization-based approach for the design of RF integrated inductors is addressed. For the characterisation of the inductor behaviour the double pi-model is used. The use of this model is twofold. On one hand it enables the generation of the inductor characterisation in a few seconds. On the other hand its integration into the optimization procedure is straightforward. For the evaluation of the model element values analytical expressions based on technology parameters as well as on the device geometric characteristics are used. The use of a technology-based methodology for the evaluation of the model parameters grants the adaptability of the model to any technology. The inductor analytical characterization is integrated into an optimization-based tool for the automatic design of RF integrated inductors. This tool uses a modified genetic algorithm (MGA) optimization procedure, which has proved its validation in previous work. Due to the design parameter constraints nature as well as the topology constraints, discrete variables optimization techniques are used. The accuracy of the results is checked against a non-commercial software.

This Chapter presents the optimal design of radio-frequency integrated spiral inductors. The basic idea is to generate an analytical model to characterize integrated inductors based on the double {\ensuremathπ}-model, and offer to the designer an approach to determine the inductor layout parameters. Particle Swarm Optimization technique is used to generate optimal values of parameters of the developed models. Viability of the proposed models is highlighted via comparison with ASITIC simulation results.

Voltage-Controlled Oscillators (VCOs) are widely used in wireless transceivers. Due to the stringent specifications regarding phase-noise, LC-VCOs are usually adopted. The need for maximizing phase-noise as well as minimizing the power consumption makes imperious the adoption of optimization-based design methodologies. For the optimization of the LC-VCO characteristics, special attention must be paid to the integrated inductor design, since its quality factor may have a strong influence in the LC-VCO phase-noise. Furthermore, designers must ensure that the higher limit of VCO operating frequency is sufficiently below the inductor resonant frequency. In this chapter, a study on the influence of the quality factor of the inductors on the LC-VCO overall behavior is presented. Then, optimization of integrated inductors by exploring the inductor geometric layout is presented. Finally, results obtained for the design of an LC-VCO in 130nm Technology using a previously optimized inductor are presented.

This paper presents an analytical model for CMOS delay and power estimation in deep sub micrometer technologies. In this paper the EKV transistor model is considered as a way of granting the accuracy of results in the characterization of deep submicron CMOS circuits. The analytical model proposed is valid for a ramp input signal, and takes into account all the operation regions of the transistor as well the influence of the gate-to-drain capacitance. For estimating the power consumption, a simple numerical integration process is applied to the current wave. An application example considering the use of the model for the evaluation of the delay and power consumption associated to a CMOS inverter is considered. The validity of the results obtained with the proposed model for a 1.2V TSMCN65 CMOS inverter is checked against those obtained through Hspice simulation.

This paper presents an application for the automatic design of ring VCOs. In this application a VCO model based on the Npower transistor model is considered as a away of granting the accuracy of results for submicron technologies. In order to easily integrate any VCO previously designed into a PLL automatic design tool, a corresponding linear model of the VCO is automatically generated, yielding a simple and precise characterization for higher level system design. The design of a 150 MHz VCO using a seven stage ring topology is presented. The validity of the design obtained is checked against Hspice simulation of the circuit.

The progressive scaling of CMOS technology towards nanometre sizes has made the implementation of highly integrated systems for the wireless communication systems possible. Additionally, higher speed, lower power consumption and area reduction has been reached. Due to the high-density integration needs, as well as to low cost fabrication, RF applications, such as the LC-voltage controlled oscillator (LC-VCO), are usually implemented in CMOS technology. The complexity of designing LC-VCOs has lead to the development of several design methodologies. This chapter introduces an optimization based methodology for the design of LC-VCOs, where its efficiency is granted by the use of analytical models to characterize the active and passive elements’ behaviour.

In his paper the design of LC-VCOs is addressed. Due to the high-density integration needs as well as to low cost fabrication, RF applications are usually implemented in CMOS technology. However, this technology development brought up several issues such as the degradation of on-chip LC tank quality factor, yielding VCO's phase noise limitation. To overcome phase-noise limitations, optimization design methodologies are usually used. Since electromagnetic simulations are timely expensive, model based approaches are needed. In this work the characterization of the oscillator behaviour is guaranteed by a set of analytical models describing each circuit element performance. A set of working examples for UMC130 technology, aiming the VCO phase noise and power consumption optimization, is addressed. The results presented, spotlight the potential of the proposed design methodology, combined with a GA optimization procedure, for an accurate and timely efficient oscillator design. The accuracy of the results is checked against HSPICE/RF simulator.

In this paper an interoperability solution is proposed, aiming to go from (building) construction models to energy simulation. Moreover, the energy simulation results will feed the KPI’s analysis of a designed building. The proposed solution will be used to translate different data formats allowing the communication between different systems in an automated environment. The solution presented in this paper exploits the concept of Plug’n’Interoperate (PnI), that is supported by the principle of self-configuration as to automate, as much as possible, the configuration and participation of systems into a shared interoperability environment. In order to validate this approach two different scenarios were taken into account, translating from a CAD (Computer- Aided Design) model data format to an energy simulation data format.