{A nonvacuum and low temperature process for passivating transparent metal oxides based thin-film transistors is presented. This process uses the epoxy-based SU-8 resist which prevents device degradation against environmental conditions, vacuum or sputtering surface damage. The incorporation of SU-8 as a passivation layer is based on the ability of this polymer to provide features with high mechanical and chemical stability. With this approach, lithography is performed to pattern the resist over the active area of the device in order to form the passivation layer. The resulting transistors demonstrate very good electrical characteristics, such as μFE =61 cm2 /V s

High visible to near infrared (NIR) transparent Mo (0-1 at%) doped In2O3 (IMO) thin films with high carrier mobility were deposited on Corning-1737 glass substrates at 400 °C by spray pyrolysis experimental technique. The films were annealed in vacuum (∼1×10-4 mbar) at 550 °C for 45 min. XRD analysis confirmed that indium oxide belongs to cubic bixbyite structure. The preferred growth orientation along (2 2 2) plane for low Mo doping level shifts to (4 0 0) for higher Mo doping levels. Crystallite sizes extracted from the XRD data corroborate the changes in full-width at half-maximum due to the variation in Mo doping. Scanning electron microscopy study illustrates the evolution in surface microstructures as a function of Mo doping. The negative sign of Hall coefficient confirmed n-type conductivity. Films with high mobility of ∼149 cm2/(V s), carrier concentration of ∼1.0×1020 cm-3, resistivity of ∼4.0×10-4 Ω cm and high figure of merit of ∼1.02×10-2 Ω-1 were observed for post-annealed films (0.5 at% Mo). The obtained high average transparency of ∼83% in the wavelength range 400-2500 nm confirms that transmittance is well extended into the NIR region. © 2009 Elsevier B.V. All rights reserved.

We have investigated the electrical properties of metal-semiconductor field-effect transistors (MESFET) based on amorphous oxide semiconductor channels. All functional parts of the devices were sputter-deposited at room temperature. The influence on the electrical properties of a 150 °C annealing step of the gallium-indium-zinc-oxide channel is investigated. The MESFET technology offers a simple route for processing of the transistors with excellent electrical properties such as low subthreshold swing of 112 mV/decade, gate sweep voltages of 2.5 V, and channel mobilities up to 15 cm2 /V s. © 2010 American Institute of Physics.

This paper discusses the properties of sputtered multicomponent amorphous dielectrics based on mixtures of high-κ and high-bandgap materials and their integration in oxide TFTs, with processing temperatures not exceeding 1 50° C. Even if Ta2O5 films are already amorphous, multicomponent materials such as Ta2O5-SiO2 and Ta2O5-Al2O3 allow an increase in the bandgap and the smoothness of the films, reducing their leakage current and improving (in the case of Ta2O5-SiO2)the dielectric/semiconductor interface properties when these dielectrics are integrated in TFTs. For HfO2- based dielectrics, the advantages of multicomponent materials are even clearer: while HfO2 films present a polycrystalline structure and a rough surface, HfO2-SiO2 films exhibit an amorphous structure and a very smooth surface. The integration of the multicomponent dielectrics in GIZO TFTs allows remarkable performance, comparable with that of GIZO TFTs using SiO2 deposited at 400°C by PECVD. For instance, with Ta2O5-SiO2 as the dielectric layer, field-effect mobility of 35 cm2/(V-sec), close to 0 V turn-on voltage, an on/off ratio higher than 106, a subthreshold slope of 0.24 V/dec, and a small/recoverable threshold voltage shifts under constant current (ID = 10 μ,A) stress during 24 hours are achieved. Initial results with multilayers of SiO2/HfO 2-SiO2/SiO2 are also shown, allowing a lower leakage current with lower thickness and excellent device performance. © Copyright 2010 Society for Information Display.

The isothermal charging current and the isothermal discharging current in low mobility materials are analyzed either in terms of polarization mechanisms or in terms of charge injection/extraction at the metal-dielectric interface and the conduction current through the dielectric material. We propose to measure the open-circuit isothermal charging and discharging currents just to overpass the difficulties related to the analysis of the conduction mechanisms in dielectric materials. We demonstrate that besides a polarization current there is a current related to charge injection or extraction at the metal-dielectric interface and a reverse current related to the charge trapped into the shallow superficial or near superficial states of the dielectric and which can move at the interface in the opposite way that occurring during injection. Two important parameters can be determined (i) the highest value of the relaxation time for the polarization mechanisms which are involved into the transient current and (ii) the height of the potential barrier W-0 at the metal-dielectric interface. The experimental data demonstrate that there is no threshold field for electron injection/extraction at a metal-dielectric interface.

The movement of a micro cantilever was detected via a self constructed portable data acquisition prototype system which integrates a linear array of 32 1D amorphous silicon position sensitive detectors (PSD). The system was mounted on a microscope using a metal structure platform and the movement of the 30 μm wide by 400 μm long cantilever was tracked by analyzing the signals acquired by the 32 sensor array electronic readout system and the relevant data algorithm. The obtained results show a linear behavior of the photocurrent relating X and Y movement, with a non-linearity of about 3%, a spatial resolution of less than 2μm along the lateral dimension of the sensor as well as of less than 3μm along the perpendicular dimension of the sensor, when detecting just the micro-cantilever, and a spatial resolution of less than 1μm when detecting the holding structure. © 2010 by the authors.

Nanostructured silicon (na-Si:H) thin films were fabricated using plasma enhanced chemical vapour deposition (PECVD) technique under high silane hydrogen dilution and a discharge frequency of 27 MHz, where the substrate was located in the dark region of the plasma, protected by a grounded metal grid. By not exposing the growth surface directly to the plasma we avoid the silicon growth surface to sustain a high ion bombardment leading to a less defective surface and highly compact films. The intrinsic films grown under these conditions were used to produce the channel region of thin film transistors (TFTs) with a bottom gate staggered configuration, integrating different dielectric layers. The devices produced exhibit a field effect mobility close to 1.84 cm 2 V -1S -1, threshold voltage around 2 V, on/off ratio above 10 7 and sub-threshold slope below 0.5 V/decade, depending on the dielectric used. Copyright © 2010 American Scientific Publishers All rights reserved.