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The spread of systems that provide parallelism either ‘‘in-the-large’’ (grid infrastructures, clusters) or ‘‘in-the-small’’ (multi-core chips), creates new opportunities for exploiting parallelism in a wider spectrum of application domains. However, the increasing complexity of parallel and distributed platforms renders the programming, the use, and the management of these systems a costly endeavor that requires advanced expertise and skills. Therefore, there is an increasing need for powerful support tools and environments that will help end-users, application programmers, software engineers and system administrators to manage the increasing complexity of parallel and distributed platforms.

The spread of systems that provide parallelism either «in-the-large» (grid infrastructures, clusters) or «in-the-small» (multi-core chips), creates new opportunities for exploiting parallelism in a wider spectrum of application domains. However, the increasing complexity of parallel and distributed platforms renders the programming, the use, and the management of these systems a costly endeavor that requires advanced expertise and skills. Therefore, there is an increasing need for powerful support tools and environments that will help end-users, application programmers, software engineers and system administrators to manage the increasing complexity of parallel and distributed platforms.

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The emergence of multi-core processors is promoting the use of concurrency and multithreading. To raise the abstraction level of synchronization constructs is fundamental to ease the development of concurrent software, and Software Transactional Memory (STM) is a good approach towards such goal. However, execution environment issues such as the processor instruction set, caching policy, and memory model, may have strong influence upon the reliability of STM engines. This paper addresses the testing of STM engines aiming at improving their reliability and independence from execution environment. From our experience with porting and extending a specific STM engine, we report on some of the bugs found and synthesize some testing patterns that proved to be useful at testing STM engines.

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Algebraic theories for modeling components and their interactions offer abstraction over the specifics of component states and interfaces. For example, such theories deal with forms of sequential composition of two components in a manner independent of the type of data stored in the states of the components, and independent of the number and types of methods offered by the interfaces of the combinators. General purpose programming languages do not offer this level of abstraction, which implies that a gap must be bridged when turning component models into implementations. In this paper, we present an approach to prototyping of component-based systems that employs so-called type-level programming (or compile-time computation) to bridge the gap between abstract component models and their type-safe implementation in a functional programming language. We demonstrate our approach using Barbosa's model of components as generalized Mealy machines. For this model, we develop a combinator library in Haskell, which uses type-level programming with two effects. Firstly, wiring between components is computed during compilation. Secondly, the well-formedness of the component compositions is guarded by Haskell's strong type system.

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This paper presents the design of a test rig for an all HTS linear synchronous motor. Although this motor showed to have several unattractive characteristics, its design raised a number of problems which must be considered in future HTS machines design. HTS electromagnetic properties led to the development of new paradigms in electrical machines and power systems, as e. g. in some cases iron removal and consequent assembly of lighter devices. This is due to superconductor's ability to carry high currents with minimum losses and consequent generation in the surrounding air of flux densities much higher than the allowed by ferromagnetic saturation. However, severe restrictions in HTS power devices design that goes further beyond cryogenic considerations must be accounted in. This is usually the case when BSCCO tapes are used as conductors. Its bending limitations and the presence of flux components perpendicular to tape surface, due to the absence of iron, have to be considered for it may turn some possible applications not so attractive or even practically unfeasible. An all HTS linear synchronous motor built by BSCCO tapes as armature conductors and two trapped-flux YBCO bulks in the mover was constructed and thrust force measurements are starting to be performed. Although the device presents severe restrictions due to the exposed and other reasons, it allowed systematising its design. A pulsed-field magnetiser to generate opposite fluxes for both YBCO bulks is also detailed. Thrust force numerical predictions were already derived and presented.

This paper presents the design of a test rig for an all HTS linear synchronous motor. Although this motor showed to have several unattractive characteristics, its design raised a number of problems which must be considered in future HTS machines design. HTS electromagnetic properties led to the development of new paradigms in electrical machines and power systems, as e. g. in some cases iron removal and consequent assembly of lighter devices. This is due to superconductor's ability to carry high currents with minimum losses and consequent generation in the surrounding air of flux densities much higher than the allowed by ferromagnetic saturation. However, severe restrictions in HTS power devices design that goes further beyond cryogenic considerations must be accounted in. This is usually the case when BSCCO tapes are used as conductors. Its bending limitations and the presence of flux components perpendicular to tape surface, due to the absence of iron, have to be considered for it may turn some possible applications not so attractive or even practically unfeasible. An all HTS linear synchronous motor built by BSCCO tapes as armature conductors and two trapped-flux YBCO bulks in the mover was constructed and thrust force measurements are starting to be performed. Although the device presents severe restrictions due to the exposed and other reasons, it allowed systematising its design. A pulsed-field magnetiser to generate opposite fluxes for both YBCO bulks is also detailed. Thrust force numerical predictions were already derived and presented.

The emergence of multi-core processors is promoting the use of concurrency and multithreading. To raise the abstraction level of synchronization constructs is fundamental to ease the development of concurrent software, and Software Transactional Memory (STM) is a good approach towards such goal. However, execution environment issues such as the processor instruction set, caching policy, and memory model, may have strong influence upon the reliability of STM engines. This paper addresses the testing of STM engines aiming at improving their reliability and independence from execution environment. From our experience with porting and extending a specific STM engine, we report on some of the bugs found and synthesize some testing patterns that proved to be useful at testing STM engines.

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