Here we report the performance of a selective floating gate (V GS) n-type non-volatile memory paper field-effect transistor. The paper dielectric exhibits a spontaneous polarization of about 1 mCm-2 and GIZO and IZO amorphous oxides are used respectively as the channel and the gate layers. The drain and source regions are based in continuous conductive thin films that promote the integration of fibres coated with the active semiconductor. The floating memory transistor writes, reads and erases the stored information with retention times above 14500 h, and is selective (for VGS > 5 ± 0.1 V). That is, to erase stored information a symmetric pulse to the one used to write must be utilized, allowing to store in the same space different information. © 2009 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

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Molybdenum doped (0-1 at. %) indium oxide thin films with high near infrared (NIR) transparency and carrier mobility were deposited on Corning-1737 glass substrates at 400 °C by spray pyrolysis experimental technique. Films with mobility as high as ∼149 cm2 /V s were obtained when annealed in vacuum at 550 °C, which also possess carrier concentration of ∼1× 1020 cm-3 and resistivity as low as ∼4.0× 10-4 cm. Further, both the average visible transmittance (500-800 nm) and the average NIR transmittance are >83%. This clearly shows that the transmittance is extended well into the NIR region. © 2009 American Institute of Physics.

In this work, we present the structural and electrical properties of HfO 2, HfO 2 +SiO 2, and HfO 2 +Al 2O 3 dielectric composite layers deposited by sputtering without any intentional substrate heating. The films were deposited on glass and 〈100〉 crystalline silicon (c-Si) substrates from ceramic targets by using argon (Ar) and oxygen (O 2) as sputtering and reactive gases, respectively. The incorporation of SiO 2 and Al 2O 3 into hafnia was obtained by co-sputtering and itwas controlled by adjusting the ratio of r.f. power applied between the targets. The HfO 2 films present a microcrystalline structure, when deposited at room temperature (RT). The lowest leakage current in c-Si MIS (Metal-Insulator- Semiconductor) structures (below 10 9A/cm 2 at 10V on films with a thickness around 180 nm) was obtained for an Ar/O 2 ratio of 14:1 sccm, and further increase in O 2 flow does not enhance the electrical characteristics. The codeposition of SiO 2 or Al 2O 3 with hafnia has a strong influence on the structure of the resulting films since they become amorphous. The leakage current in MISstructures incorporating these multi-component dielectrics is reduced at least by a factor of 2, which is accompanied by an increase on the band gap. The dielectric constant is decreased due to the lower values for SiO 2 and Al 2O 3. © 2009 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Mathematics Subject Classification: 26A33, 76M35, 82B31A stochastic solution is constructed for a fractional generalization of the KPP (Kolmogorov, Petrovskii, Piskunov) equation. The solution uses a fractional generalization of the branching exponential process and propagation processes which are spectral integrals of Levy processes.

Zinc oxide is getting an enormous attention due to its potential applications in a variety of fields such as optoelectronics, spintronics and sensors. The renewed interest in this wide band gap oxide semiconductor relies on its direct high energy gap (Eg ∼ 3.437 eV at low temperatures) and large exciton binding energy. However to reach the stage of device production the difficulty to produce in a reproducible way p-type doping must be overcome. In this study we discuss the structural and optical properties of ZnO films doped with nitrogen, a potential p-type dopant. The films were deposited by magnetron sputtering using different conditions and substrates. The composition and structural properties of the films were studied combining X-ray diffraction (XRD), Rutherford backscattering (RBS), and heavy ion elastic recoil detection analysis (HI-ERDA). The results show an improvement of the quality of the films deposited on sapphire with increasing radio-frequency (RF) power with a preferentially growth along the c-axis. The ERDA analysis reveals the presence of H in the films and a homogeneous composition over the entire thickness. The photoluminescence of annealed samples evidences an improvement on the optical quality as identified by the well structured near band edge recombination. © 2009 Elsevier Ltd. All rights reserved.

The coordination properties of the beta-keto phosphine ligands R(2)PCH(2)C(O)Ph (HL(1), R = i-Pr; HL(2), R = Ph), of the new acetamide-derived phosphine ligand (i-Pr)(2)PNHC(O) Me (HL(3)) and of Ph(2)PNHC(O) Me (HL(4)) have been examined towards Ni(II) complexes. Comparisons are made between systems in which the PCH(2) function of the ketophosphine has been replaced with an isoelectronic PNH group in amide-derived ligands, or the PCH functionality of phosphinoenolates with a PN group in phosphinoiminolate complexes. Furthermore, ligands HL(2) and HL(4) reacted with [(eta(5)-C(5)H(5))CoI(2)(CO)] to afford the phosphine mono-adducts [(eta(5)-C(5)H(5))CoI(2){Ph(2)PCH(2)C(O)Ph}] (1) and [(eta(5)-C(5)H(5))CoI(2){Ph(2)PNHC(O)Me}] (3), respectively, which upon reaction with excess NEt(3) yielded the phosphinoenolate complex [(eta(5)-C(5)H(5))CoI{Ph(2)PCH (center dot center dot center dot) under barC((center dot center dot center dot) under barO)Ph}] (2) and the phosphinoiminolate complex [(eta(5)-C(5)H(5))CoI{Ph(2)PN (center dot center dot center dot) under barC((center dot center dot center dot) under barO)Me}] (4), respectively. The complexes cis-[Ni{(i-Pr)(2)PN (center dot center dot center dot) under barC((center dot center dot center dot) under barO)Me}(2)] (6) and cis-[Ni{Ph(2)PN (center dot center dot center dot) under barC((center dot center dot center dot) under barO)Me}(2)] (7) were obtained similarly from NiCl(2) and HL(3) and HL(4), respectively, in the presence of a base. The phosphinoenolate complex [Ni{(i-Pr)(2)PCH (center dot center dot center dot) under barC((center dot center dot center dot) under barO) Ph}(2)] (5) exists in ethanol as a mixture of the cis and trans isomers, in contrast to cis-[Ni{(Ph(2)PCH (center dot center dot center dot) under barC((center dot center dot center dot) under barO)Ph}(2)], and the solid-state structure of the trans isomer of 5 was established by X-ray diffraction. The structures of the ligand HL3 and of the complexes 1, 3 in 3 center dot 3/2CH(2)Cl(2), 4, 6 and 7 have also been determined by X-ray diffraction and are compared with those of related complexes. Complexes 4, 6 and 7 contain a five-membered heteroatomic metallocyclic moiety, which is constituted by five different chemical elements. The structural consequences of the steric bulk of the P substituents and of the electronic characteristics of the P, O chelates are discussed.

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An extensive conformational analysis was carried at ab initio and DFT levels of theory on two molecules - methyl 2-azidopropionate (N3CH3CHCOOCH3) and methyl 3-azidopropionate (N3CH2CH2COOCH3). In each case, the lowest energy conformers were characterized and the energy barriers between them were estimated. Ionization energies and vibrational frequencies were also computed, in order to support future spectroscopic studies with ultraviolet photoelectron spectroscopy (UVPES) and matrix isolation infrared spectroscopy (Matrix Isolation FTIR).

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This work analyzes the role of processing parameters on the electrical performance of GIZO (Ga2 O3: In2 O3:ZnO) films and thin-film transistors (TFTs). Parameters such as oxygen partial pressure, deposition pressure, target composition, thickness, and annealing temperature are studied. Generally, better devices are obtained when low oxygen partial pressure is used. This is related to the damage induced by oxygen ion bombardment and very high film's resistivity when higher oxygen partial pressures are used. Low deposition pressures and targets with richer indium compositions led to films with high carrier concentration, resulting in transistors with field-effect mobility as high as ∼80 cm2 Vs but poor channel conductivity modulation, becoming ineffective as switching devices. Nevertheless, it is demonstrated that reducing the GIZO thickness from 40 to 10 nm greatly enhances the switching behavior of those devices, due to the lower absolute number of free carriers and hence to their easier depletion. Annealing also proves to be crucial to control device performance, significantly modifying GIZO electrical resistivity and promoting local atomic rearrangement, being the optimal temperature determined by the as-produced films' properties. For the best-performing transistors, even with a low annealing temperature (150°C), remarkable properties such as μFE =73.9 cm2 Vs, onoff ratio≈7× 107, VT ≈0.2 V, and S=0.29 Vdec are achieved. © 2008 The Electrochemical Society.

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Transactional memory is a new trend in concurrency control that was boosted by the advent of multi-core processors and the near to come many-core processors. It promises the performance of finer grain with the simplicity of coarse grain threading. However, there is a clear absence of software development tools oriented to the transactional memory programming model, which is confirmed by the very small number of related scientific works published until now. This paper describes ongoing work. We propose a very low overhead monitoring framework, developed specifically for monitoring TM computations, that collects the transactional events into a single log file, sorted in a global order. This framework is then used by a visualization tool to display different types of charts from two categories: statistical charts and thread-time space diagrams. These last diagrams are interactive, allowing to identify conflicting transactions. We use the visualization tool to analyse the behavior of two different, but similar, testing applications, illustrating how it can be used to better understand the behavior of these transactional memory applications.

Software Transactional Memory is a concurrency control technique gaining increasing popularity, as it provides high-level concurrency control constructs and eases the development of highly multi-threaded applications. But this easiness comes at the expense of restricting the operations that can be executed within a memory transaction, and operations such as terminal and file I/O are either not allowed or incur in serious performance penalties. Database I/O is another example of operations that usually are not allowed within a memory transaction. This paper proposes to combine memory and database transactions in a single unified model, benefiting from the ACID properties of the database transactions and from the speed of main memory data processing. The new unified model covers, without differentiating, both memory and database operations. Thus, the users are allowed to freely intertwine memory and database accesses within the same transaction, knowing that the memory and database contents will always remain consistent and that the transaction will atomically abort or commit the operations in both memory and database. This approach allows to increase the granularity of the in-memory atomic actions and hence, simplifies the reasoning about them.

In this paper a discrete-variable optimization methodology for the automatic design of CMOS integrated spiral inductors is introduced. The use of discrete variable optimization procedure offers the designer the possibility for exploring the design space exclusively in those points available for the technology under use. Further user-defined constraints between layout parameters may also be incorporated as a way of taking into account design heuristics. A comparison between using discrete-variable optimization and a continuous optimization procedure followed by a discretization of the results is presented, where the benefits of the proposed methodology are presented. An application using the proposed methodology was developed in Matlab and the optimization toolbox is used. For the sake of simplicity the pi-model has been used for characterizing the inductor. The validity of the design results is checked against circuit simulation with ASITIC.

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