Abstract This work presents an experimental study on the effect of ply-level hybridisation on the tensile unnotched and notched response of composite laminates. In a first assessment, notched tests were performed on laminates with nominal ply thicknesses between 0.03 mm and 0.30 mm. From the understanding of the effect of ply thickness on the damage mechanisms that govern the notched response of laminates, the concept of ply-level hybridisation is introduced, which consists in combining plies of different grades. A uniform combination of thin and conventional plies resulted in a hybrid laminate with intermediate notched response. Selective hybridisation, where thin off-axis plies are combined with thicker 0° plies, resulted in a globally enhanced notched behaviour without compromising the unnotched and fatigue responses. This work clearly shows how ply-level hybridisation, when designed to trigger specific damage mechanisms, can be used to improve the notched response of composite laminates.

In this paper, the role of electrode architecture (conventional and interdigital), device structure (vertical or planar), and tungsten oxide (WO3) channel thickness on the electro-optical performances of room temperature sputtered electrochromic transistors (EC-Ts) is reported. A larger number of electro-reducible tungsten sites in thicker WO3 films provide improved optical density and coloration efficiency. However, overall transistor performance is found to suffer in planar EC-Ts with the conventional electrode architecture, where the step to planar interdigital electrodes leaves the devices to be almost insensitive to WO3 thickness. Vertical structures result in improved device properties and stability, given to the shorter distance between gate electrode and semiconductor and to the encapsulation effect provided by such structures. These devices show an On–Off ratio of 5 × 106 and a transconductance (g m) of 3.59 mS, for gate voltages (V G) between −2 and 2 V, which to the authors' knowledge are the best values ever reported for electrochemical transistors. The simple and low-cost processing together with the electrical/optical performances well supported into a comprehensive analysis of device physics opens doors for a wide range of new applications in display technologies, biosensors, fuel cells, or electrochemical logic circuits. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim

High-k alkaline lithium oxide (LiOx) thin films are fabricated by spin-coating method. The LiOx thin films are annealed at different temperatures and characterized by various techniques. An optimized LiOx dielectric is achieved at an annealing temperature of 300 °C and exhibits wide bandgap of ≈5.5 eV, smooth surface, relatively permittivity of ≈6.7, and low leakage current density. The as-fabricated LiOx thin films are integrated, as gate dielectrics, in both n-channel indium oxide (In2O3) and p-channel cupric oxide (CuO) transistors. The optimized In2O3/LiOx thin-film transistor (TFT) exhibits high performance and high stability, such as Ion/Ioff of 107, electron mobility of 5.69 cm2 V−1 s−1, subthreshold swing of 70 mV dec−1, negligible hysteresis, and threshold voltage shift of 0.1 V under bias stress for 1.5 h. Meanwhile, the p-channel CuO TFT based on LiOx dielectric shows high Ion/Ioff of 105 and hole mobility of 1.72 cm2 V−1 s−1. All the electrical performances are achieved at an ultra-low operating voltage of 2 V. Considering the simple procedure, the moderate annealing temperature, and the low power consumption merits, these outstanding characteristics represent a significant advance toward the development of battery compatible and portable electronics. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim

Solution-processed metal-oxide thin films with high dielectric constants (k) have been extensively studied for low-cost and high-performance thin-film transistors (TFTs). In this report, MgO dielectric films were fabricated using the spin-coating method. The MgO dielectric films annealed at various temperatures (300, 400, 500, and 600 °C) were characterized by using thermogravimetric analysis, optical spectroscopy, X-ray diffraction, X-ray photoelectron spectroscopy, and atomic-force microscopy. The electrical measurements indicate that the insulating properties of MgO thin films are improved with an increase in annealing temperature. In order to clarify the potential application of MgO thin films as gate dielectrics in TFTs, solution-derived In2O3 channel layers were separately fabricated on various MgO dielectric layers. The optimized In2O3/MgO TFT exhibited an electron mobility of 5.48 cm2/V s, an on/off current ratio of 107, and a subthreshold swing of 0.33 V/dec at a low operation voltage of 6 V. This work represents a great step toward the development of portable and low-power consumption electronics. © 2016 Author(s).

The reduction of aCu2O layer on copper by exposure toTMAduring the atomic layer deposition of Al2O3 has recently been reported. (Gharachorlou et al 2015 ACS Appl. Mater. Interfaces 7 16428-16439). The study presented here analyzes a similar process, leading to the reduction of a homogeneous Cu2O thin film, which allows for additional observations. Angle-resolved in situ X-ray photoelectron spectroscopy confirms the localization of metallic copper at the interface. The evaluation of binding energy shifts reveals the formation of aCu2O/Cu Schottky barrier, which gives rise to Fermi level pinning in Cu2O. An initial enhancement of the ALD growth per cycle (GPC) is only observed for bulk Cu2O samples and is thus related to lattice oxygen, originating from regions lying deeper than just the first few layers of the surface. The oxygen out-take from the substrate is limited to the first few cycles, which is found to be due to a saturated copper reduction, rather than the oxygen diffusion barrier of Al2O3. © 2016 IOP Publishing Ltd.