Aguas, H., Pereira Costa Raniero Fortunato Martins L. D. L. "
Role of the oxide layer on the performances of a-Si:H schottky structures applied to PDS fabrication."
Materials Research Society Symposium Proceedings. Vol. 910. 2007. 415-420.
AbstractIn this work we present results of studies performed on Schottky and metal-insulator-semiconductor (MIS) position sensitive detectors (PSD) structures: substrate (glass)/ Cr (300 nm) / a-Si:H [n] (37 nm) / a-Si:H [i] (600 nm) / SiO2 (1.5 nm - for the MIS) / Au (7 nm). The effect of the interfacial oxide layer between Au and a-Si:H, for the MIS structures, was studied and compared with the Schottky, in order to determine how beneficial it could be for device performances and time degradation. For doing so, the Au thickness of 70Å was deposited by thermal evaporation on an oxide free (Schottky) and oxidized (≈20Å) (MIS) a-Si:H surfaces. These structures were characterized by SIMS, RBS, SEM and AFM in order to correlate the obtained diffusion profile of Au at the interface and the topography with the presence of the oxide at the interface. The results show that the Au inter-diffuses very easily in the oxide free a-Si:H surface, even at room temperature, degrading the devices performance. On the other hand, the MIS structures, with their interfacial oxide present no structural changes after annealing and the PSD produced are stable. We believe that this effect is associated with the barrier effect of the interfacial oxide that prevents the Au diffusion. The optimized 1D MIS sensors are stable and exhibit a linearity error as low as 0.8 % and sensitivities of 33 mV/cm for a 5 mW spot beam intensity at a wavelength of 532 nm, while the Schottky sensors showed a time degradation of their characteristics. © 2006 Materials Research Society.
Pina, João, Pedro Pereira, S. Valtchev, A. Gonçalves, Mário Neves, and A. Rodrigues. "
A test rig for thrust force measurements f an all HTS linear synchronous motor."
8th European Conference on Applied Superconductivity (EUCAS). 2007.
AbstractThis paper presents the design of a test rig for an all HTS linear synchronous motor. Although this motor showed to have several unattractive characteristics, its design raised a number of problems which must be considered in future HTS machines design. HTS electromagnetic properties led to the development of new paradigms in electrical machines and power systems, as e. g. in some cases iron removal and consequent assembly of lighter devices. This is due to superconductor's ability to carry high currents with minimum losses and consequent generation in the surrounding air of flux densities much higher than the allowed by ferromagnetic saturation. However, severe restrictions in HTS power devices design that goes further beyond cryogenic considerations must be accounted in. This is usually the case when BSCCO tapes are used as conductors. Its bending limitations and the presence of flux components perpendicular to tape surface, due to the absence of iron, have to be considered for it may turn some possible applications not so attractive or even practically unfeasible. An all HTS linear synchronous motor built by BSCCO tapes as armature conductors and two trapped-flux YBCO bulks in the mover was constructed and thrust force measurements are starting to be performed. Although the device presents severe restrictions due to the exposed and other reasons, it allowed systematising its design. A pulsed-field magnetiser to generate opposite fluxes for both YBCO bulks is also detailed. Thrust force numerical predictions were already derived and presented.
Louren{\c c}o, João, and Gon{\c c}alo Cunha. "
Testing patterns for software transactional memory engines."
Proceedings of the 2007 ACM workshop on Parallel and distributed systems: testing and debugging. PADTAD ’07. New York, NY, USA: ACM, 2007. 36-42.
AbstractThe emergence of multi-core processors is promoting the use of concurrency and multithreading. To raise the abstraction level of synchronization constructs is fundamental to ease the development of concurrent software, and Software Transactional Memory (STM) is a good approach towards such goal. However, execution environment issues such as the processor instruction set, caching policy, and memory model, may have strong influence upon the reliability of STM engines. This paper addresses the testing of STM engines aiming at improving their reliability and independence from execution environment. From our experience with porting and extending a specific STM engine, we report on some of the bugs found and synthesize some testing patterns that proved to be useful at testing STM engines.