%0 Journal Article %J AIP Advances %D 2016 %T Interpreting anomalies observed in oxide semiconductor TFTs under negative and positive bias stress %A Jin, J.W.a , Nathan, A.b , Barquinha, P.c , Pereira, L.c , Fortunato, E.c , Martins, R.c , Cobb, B.d %R 10.1063/1.4962151 %U https://www.scopus.com/inward/record.uri?eid=2-s2.0-84984677284&partnerID=40&md5=f3cff1341caca5041c8a817faa91e99f %V 6 %X

Oxide semiconductor thin-film transistors can show anomalous behavior under bias stress. Two types of anomalies are discussed in this paper. The first is the shift in threshold voltage (VTH) in a direction opposite to the applied bias stress, and highly dependent on gate dielectric material. We attribute this to charge trapping/detrapping and charge migration within the gate dielectric. We emphasize the fundamental difference between trapping/detrapping events occurring at the semiconductor/dielectric interface and those occurring at gate/dielectric interface, and show that charge migration is essential to explain the first anomaly. We model charge migration in terms of the non-instantaneous polarization density. The second type of anomaly is negative VTH shift under high positive bias stress, with logarithmic evolution in time. This can be argued as electron-donating reactions involving H2O molecules or derived species, with a reaction rate exponentially accelerated by positive gate bias and exponentially decreased by the number of reactions already occurred. © 2016 Author(s).

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