A Segmented DAC Using a-IGZO TFTs for Memristor Based Neural Network Accelerators

Citation:
Das, Sagar, Suyash Shrivastava, \{Pydi Ganga\} Bahubalindruni, and Asal Kiazadeh. "A Segmented DAC Using a-IGZO TFTs for Memristor Based Neural Network Accelerators." IFETC 2023 - 5th IEEE International Flexible Electronics Technology Conference. International Flexible Electronics Technology Conference (IFETC). United States: Institute of Electrical and Electronics Engineers (IEEE), 2023.

Abstract:

This paper presents a pulse amplitude modulated signal generator to address inference in Memristor based Neural Network Accelerators. As a part of this system, a novel 8-bit capacitive segmented Digital to Analog Converter (DAC) using amorphous Indium Galium Zinc Oxide (a-IGZO) thin-film transistor (TFT) technology has been designed. The DAC employs 50% segmentation with binary coded least significant bits (LSBs) and unary coded most significant bits (MSBs). This circuit has shown an ENOB of 7.3 bits at a sampling frequency of 100 kHz and an input frequency of 50 kHz. The worst case INL and DNL were recorded as 0.047 LSB and 0.34 LSB, respectively. With a power supply voltage of 5 V for the operational amplifier and 3V as the DAC reference voltage, the power consumption of the complete DAC was around 1.25 mW. This circuit can find potential applications in different flexible electronics systems.

Notes:

Publisher Copyright: © 2023 IEEE.; 5th IEEE International Flexible Electronics Technology Conference, IFETC 2023 ; Conference date: 13-08-2023 Through 16-08-2023