Cunha, J. C., P. D. Medeiros, J. M. Lourenço, V. Duarte, J. Vieira, B. Moscão, D. Pereira, and R. Vaz,
"The DOTPAR Project: Towards a Framework Supporting Domain Oriented Tools for Parallel and Distributed Processing",
Proceedings of the International Conference and Exhibition on High-Performance Computing and Networking (HPCN'98), London, UK, Springer-Verlag, pp. 952–954, 1998.
AbstractWe discuss the problem of building domain oriented environments by a composition of heterogeneous application components and tools. We describe several individual tools that support such environments, namely a distributed monitoring and control tool (DAMS), a process-based distributed debugger (PDBG) and a heterogeneous interconnection model (PHIS). We discuss our experience with the development of a Problem Oriented Environment in the domain of genetic algorithms, obtained by a composition of heterogeneous tools and application components.
Dias, R. J., J. M. Lourenço, and G. Cunha,
"Developing libraries using software transactional memory",
Comput. Sci. Inf. Syst., vol. 5, issue 2, no. 2, pp. 103–117, 2008.
AbstractSoftware transactional memory is a promising programming model that adapts many concepts borrowed from the databases world to control concurrent accesses to main memory (RAM). This paper discusses how to support revertible operations, such as memory allocation and release, within software libraries that will be used in software memory transactional contexts. The proposal is based in the extension of the transaction life cycle state diagram with new states associated to the execution of user-defined handlers. The proposed approach is evaluated in terms of functionality and performance by way of a use case study and performance tests. Results demonstrate that the proposal and its current implementation are flexible, generic and efficient
Dias, R. J., J. Lourenço, and G. Cunha,
"Developing Libraries Using Software Transactional Memory",
CoRTA 2008: Proceedings of the Conference on Compilers, Related Technologies and Applications, Bragança, Portugal, Instituto Politécnico de Bragança - ESTG, 2008.
AbstractSoftware transactional memory (STM) is a promising programming model that adapts many concepts borrowed from the databases world to control concurrent accesses to main memory (RAM) locations. This paper aims at discussing how to support apparently irreversible operations within a memory transaction.
Teixeira, B., J. M. Lourenço, E. Farchi, R. J. Dias, and D. Sousa,
"Detection of Transactional Memory Anomalies using Static Analysis",
Proceedings of the 8th Workshop on Parallel and Distributed Systems: Testing, Analysis, and Debugging (PADTAD'10), New York, NY, USA, ACM, pp. 26–36, 2010.
AbstractTransactional Memory allows programmers to reduce the number of synchronization errors introduced in concurrent programs, but does not ensures its complete elimination. This paper proposes a pattern matching based approach to the static detection of atomicity violation, based on a path-sensitive symbolic execution method to model four anomalies that may affect Transactional Memory programs. The proposed technique may be used to to bring to programmer's attention pairs of transactions that the programmer has mis-specified, and should have been combined into a single transaction. The algorithm first traverses the AST tree, removing all the non-transactional blocks and generating a trace tree in the path sensitive manner for each thread. The trace tree is a Trie like data structure, where each path from root to a leaf is a list of transactions. For each pair of threads, erroneous patterns involving two consecutive transactions are then checked in the trace tree. Results allow to conclude that the proposed technique, although triggering a moderate number of false positives, can be successfully applied to Java programs, correctly identifying the vast majority of the relevant erroneous patterns.
Lourenço, J., D. Sousa, B. C. Teixeira, and R. J. Dias,
"Detecting concurrency anomalies in transactional memory programs",
Comput. Sci. Inf. Syst., vol. 8, issue 2, no. 2, pp. 533–548, 2011.
AbstractSoftware transactional memory is a promising programming model that adapts many concepts borrowed from the databases world to control concurrent accesses to main memory (RAM). This paper discusses how to support revertible operations, such as memory allocation and release, within software libraries that will be used in software memory transactional contexts. The proposal is based in the extension of the transaction life cycle state diagram with new states associated to the execution of user-defined handlers. The proposed approach is evaluated in terms of functionality and performance by way of a use case study and performance tests. Results demonstrate that the proposal and its current implementation are flexible, generic and efficient
Cunha, J. C., J. M. Lourenço, and V. Duarte,
"Debugging of parallel and distributed programs",
Parallel Program Development for Cluster Computing, Commack, NY, USA, Nova Science Publishers, Inc., pp. 97–129, 2001.
Abstract
Cunha, J. C., J. M. Lourenço, and V. Duarte,
"The DDBG distributed debugger",
Parallel Program Development for Cluster Computing, Commack, NY, USA, Nova Science Publishers, Inc., pp. 279–290, 2001.
Abstract