<?xml version="1.0" encoding="UTF-8"?><xml><records><record><source-app name="Biblio" version="6.x">Drupal-Biblio</source-app><ref-type>10</ref-type><contributors><authors><author><style face="normal" font="default" size="100%">Shreya Singh</style></author><author><style face="normal" font="default" size="100%">Bahubalindruni, Pydi</style></author><author><style face="normal" font="default" size="100%">Joao Goes</style></author></authors></contributors><titles><title><style face="normal" font="default" size="100%">A robust fully-dynamic residue amplifier for two-stage SAR assisted pipeline ADCs</style></title><secondary-title><style face="normal" font="default" size="100%">IEEE International Symposium on Circuits and Systems (ISCAS’17)</style></secondary-title></titles><dates><year><style  face="normal" font="default" size="100%">2017</style></year></dates><publisher><style face="normal" font="default" size="100%">IEEE</style></publisher><pub-location><style face="normal" font="default" size="100%">Baltimore, USA</style></pub-location></record></records></xml>