<style face="normal" font="default" size="100%">Improving Dual-Slope A/D Converter with Noise-Shaping and Digital Filtering Techniques</style>

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<style face="normal" font="default" size="100%">Improving Dual-Slope A/D Converter with Noise-Shaping and Digital Filtering Techniques</style>

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<style face="normal" font="default" size="100%">A Low Noise CMOS Inverter-Based OTA for and Healthcare Signal Receivers”, 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)</style>

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<style face="normal" font="default" size="100%">Built-in Self Test of High Speed Analog-to-Digital Converter</style>

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<style face="normal" font="default" size="100%">A Folded Voltage-Combiners Biased Amplifier for Low Voltage and High Energy-Efficiency Applications</style>

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<style face="normal" font="default" size="100%">IEEE-CAS4IIoT: 2nd Seasonal School in Circuits and Systems for the Industrial Internet of Things</style>

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<style face="normal" font="default" size="100%">Oxide TFT Rectifiers on Flexible Substrates Operating at NFC Frequency Range</style>

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<style face="normal" font="default" size="100%">Physical Training Device for Animals With Therapeutical and Entertaining Component</style>

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<style face="normal" font="default" size="100%">Sixth‐order differential Sallen‐and‐Key switched capacitor LPF using a‐IGZO TFTs</style>

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<style face="normal" font="default" size="100%">A Systematic Design Methodology for Optimization of Sigma-Delta Modulators Based on an Evolutionary Algorithm</style>

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<style face="normal" font="default" size="100%">Speeding-up Moderate-Resolution Dual-Slope A/D Converters by Combining Noise-Shaping with Efficient Digital Filtering</style>

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<style face="normal" font="default" size="100%">Impact of VCO non-linearities on VCO-based sigma-delta modulator</style>

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<style face="normal" font="default" size="100%">A High-resolution ∆-Modulator ADC with Oversampling and Noise-shaping for IoT</style>

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<style face="normal" font="default" size="100%">Continuous-Time Delta-Sigma Modulators Based on Passive RC Integrators</style>

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<style face="normal" font="default" size="100%">Current mode ΣΔ modulators designed for amperometry based medical sensors</style>

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<style face="normal" font="default" size="100%">A New Family of CMOS Cascode-Free Amplifiers with High Energy-Efficiency and Improved Gain</style>

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<style face="normal" font="default" size="100%">A Relaxation Oscillator Using IGZO Thin-Film Transistors</style>

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<style face="normal" font="default" size="100%">Single-Stage OTA biased by Voltage-Combiners with Enhanced Performance using Current Starving</style>

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<style face="normal" font="default" size="100%">Sixth‐order differential Sallen‐and‐Key switched capacitor LPF using a‐IGZO TFTs</style>

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<style face="normal" font="default" size="100%">Circuits and Systems for the Internet-of-Things, CAS4IoT</style>

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<style face="normal" font="default" size="100%">A Dynamic Voltage-Combiners Biased OTA for Low-Power and High-Speed SC Circuits</style>

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<style face="normal" font="default" size="100%">A robust fully-dynamic residue amplifier for two-stage SAR assisted pipeline ADCs</style>

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<style face="normal" font="default" size="100%">Single-Stage Amplifier biased by Voltage-Combiners with Gain and Energy-Efficiency Enhancement</style>

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<style face="normal" font="default" size="100%">A Third-Order MASH ΣΔ Modulator Using Passive Integrators</style>

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<style face="normal" font="default" size="100%">Threshold voltage extraction techniques adaptable from sub-micron CMOS to large-area oxide TFT technologies</style>

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<style face="normal" font="default" size="100%">A two-step radio receiver architecture fully embedded into a charge-sharing SAR ADC</style>

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<style face="normal" font="default" size="100%">Advanced Amplification Techniques for Nanoscale CMOS in the Context of IoT Node Sensors</style>

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<style face="normal" font="default" size="100%">A 1V 77dB-DR 72dB-SNDR 10MHz-BW 2-1 MASH CT ΣΔM</style>

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<style face="normal" font="default" size="100%">Design of a Low Phase Error Multiphase Clock Generator for Modern Wideband Receivers</style>

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<style face="normal" font="default" size="100%">Fully differential sigma-delta modulator structure for current-mode sensors</style>

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<style face="normal" font="default" size="100%">A High-Gain, High-Speed Parametric Residue Amplifier for SAR-Assisted Pipeline ADCs</style>

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<style face="normal" font="default" size="100%">Micro-needle Based ECG – Glucose Painless MEMS Sensor with Analog Front End for Portable Devices</style>

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<style face="normal" font="default" size="100%">Noise cancelling LNA with gain enhancement by using double feedback</style>

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<style face="normal" font="default" size="100%">Oxide TFTs on Flexible Substrates for Designing and Fabricating Analog-to-Digital Converters</style>

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<style face="normal" font="default" size="100%">A Second-Order ΣΔ ADC Using Sputtered IGZO TFTs</style>

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<style face="normal" font="default" size="100%">TCAD Simulation of Amorphous Indium-Gallium-Zinc Oxide Thin-Film Transistors</style>

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<style face="normal" font="default" size="100%">Undergraduate Electronics Projects Based on the Design of an Optical Wireless Audio Transmission System</style>

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<style face="normal" font="default" size="100%">Wideband Noise Cancelling Balun LNA with Feedback Biasing</style>

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<style face="normal" font="default" size="100%">Automatic design of high-order SC filter circuits</style>

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<style face="normal" font="default" size="100%">A 0.4-V 410-nW opamp-less continuous-time ΣΔ modulator for biomedical applications</style>

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<style face="normal" font="default" size="100%">A 0.7 V 256 μW ΔΣ modulator with passive RC integrators achieving 76 dB DR in 2 MHz BW</style>

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<style face="normal" font="default" size="100%">Current mode sigma-delta modulator designed with the help of transistor’s size optimization tool</style>

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<style face="normal" font="default" size="100%">A current-mode VCO-based amplifier-less 2nd-order ΔΣ modulator with over 85dB SNDR</style>

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<style face="normal" font="default" size="100%">Design of a robust general-purpose low-offset comparator based on IGZO thin-film transistors</style>

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<style face="normal" font="default" size="100%">A low-voltage voltage-controlled ring-oscillator employing dynamic-threshold-MOS and body-biasing techniques</style>

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<style face="normal" font="default" size="100%">A simple class-D audio power amplifier using a passive CT ΣΔ modulator for medium quality sound systems</style>

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<style face="normal" font="default" size="100%">Towards Cloud-Based Engineering Systems</style>

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<style face="normal" font="default" size="100%">A voltage-combiners-biased amplifier with enhanced gain and speed using current starving</style>

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<style face="normal" font="default" size="100%">A Cascode-Free Single-Stage Amplifier Using a Fully-Differential Folded Voltage-Combiner</style>

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<style face="normal" font="default" size="100%">A New Mismatch-Insensitive 1.5-Bit MDAC with Unity Feedback-Factor and Enhanced Performance</style>

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<style face="normal" font="default" size="100%">A 0.4-V 410-nW opamp-less continuous-time ΣΔ modulator for biomedical applications</style>

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<style face="normal" font="default" size="100%">A hybrid current-mode passive second-order continuous-time ΣΔ modulator</style>

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<style face="normal" font="default" size="100%">A low power 4th order MASH switched-capacitor ΣΔ modulator using ultra incomplete settling</style>

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<style face="normal" font="default" size="100%">A low power balun LNA with active loads for gain and noise figure optimization</style>

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<style face="normal" font="default" size="100%">Stability Improvements in a Rail-to-Rail Input/Output, Constant Gm Operational Amplifier, at 0.4 V Operation, Using the Low-Voltage DTMOS Technique</style>

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<style face="normal" font="default" size="100%">Techniques for Low-Power, High-Speed, High Effective-Resolution Pipeline ADCs in Deep Nanoscale CMOS</style>

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<style face="normal" font="default" size="100%">Towards Collective Awareness Systems</style>

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<style face="normal" font="default" size="100%">Single-Stage Amplifiers with Gain Enhancement and Improved Energy-Efficiency using Voltage-Combiners</style>

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<style face="normal" font="default" size="100%">A switched-capacitor biquad using a simple quasi-unity gain amplifier</style>

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<style face="normal" font="default" size="100%">A 1.2 V Low-Noise-Amplifier with Double Feedback for High Gain and Low Noise Figure</style>

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<style face="normal" font="default" size="100%">A 1.2-V 165-uW 0.29-mm2 Multi-Bit Sigma-Delta ADC for Hearing Aids using Nonlinear DACs and with over 91 dB Dynamic-Range</style>

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<style face="normal" font="default" size="100%">A 2.3-dB NF CMOS Low Voltage LNA Optimized for Medical Applications at 600MHz</style>

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<style face="normal" font="default" size="100%">A 6.2 mW 0.024 mm2 fully-passive RF downconverter with 12 dB gain enhancement using MOS parametric amplification</style>

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<style face="normal" font="default" size="100%">Cascode Amplifiers with Low-Gain Variability Using Body-Biasing Temperature and Supply Compensation</style>

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<style face="normal" font="default" size="100%">Design of Cascode-Based Transconductance Amplifiers with Low-Gain PVT Variability and Gain Enhancement Using a Body-Biasing Technique</style>

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<style face="normal" font="default" size="100%">Double Feedforward 0.6 V LNA with High Gain and Low Noise Figure</style>

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<style face="normal" font="default" size="100%">Gain Enhancement and Input Parasitic Capacitance Reduction of Single-Stage OTAs by Using Differential Voltage Combiners</style>

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<style face="normal" font="default" size="100%">A Low-Voltage CMOS Buffer for RF Applications Based on a Fully-Differential Voltage-Combiner</style>

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<style face="normal" font="default" size="100%">A Reference-Free 7-bit 500 MS/s Pipeline ADC Using Current-Mode Reference Shifting and Built-in Threshold Quantizers</style>

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<style face="normal" font="default" size="100%">A Simple 1 GHz Non-Overlapping Two-Phase Clock Generators for SC Circuits</style>

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<style face="normal" font="default" size="100%">A Switched-Capacitor Band-Pass Biquad Filter Using a Simple Quasi-unity Gain Amplifier</style>

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<style face="normal" font="default" size="100%">Balun LNA with Continuously Controllable Gain and with Noise and Distortion Cancellation</style>

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<style face="normal" font="default" size="100%">Current-Mode Reference-Shifting Solution for MDAC-based Analog-to-Digital Converters</style>

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<style face="normal" font="default" size="100%">Design Methodology for Sigma-delta Modulators based on a Genetic Algorithm using Hybrid Cost Functions</style>

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<style face="normal" font="default" size="100%">Fast and Accurate Estimation of Gain and Sample Time-Mismatches in Time-Interleaved ADCs using On-Chip Oscillators</style>

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<style face="normal" font="default" size="100%">Low Phase-Noise Temperature Compensated Self-Biased Ring-Oscillator</style>

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<style face="normal" font="default" size="100%">A balun transimpedance amplifier with adjustable gain for integrated SPO2 optic sensors</style>

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<style face="normal" font="default" size="100%">Design of Robust CMOS Amplifiers Combining Advanced Low-Voltage and Feedback Techniques</style>

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<style face="normal" font="default" size="100%">Raising Awareness for Value Creation Potential in Engineering Research</style>

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<style face="normal" font="default" size="100%">Analysis and Design of a First-Order SD Modulator based on Ultra-Incomplete Settling and Considering Non-Ideal Effects</style>

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<style face="normal" font="default" size="100%">"Parametric Analog Signal Amplification applied in Nanoscale CMOS Technologies”</style>

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<style face="normal" font="default" size="100%">Polyphase Comb Filter Based on Dispatching Input Bit-stream and Interlaying Multiplexer Techniques for Sigma-Delta ADCs</style>

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<style face="normal" font="default" size="100%">"Reference-Free High-Speed CMOS Pipeline Analog-to-Digital Converters"</style>

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<style face="normal" font="default" size="100%">“Time-Domain Optimization of Amplifiers Based on Distributed Genetic Algorithms”</style>