Interdigital electrodes (IE) are one of the most used transducers in different technical and analytical applications with the particular importance in the field of chemical and biological sensors. With the recent demand for lab-on-a-chip devices and the need for sensors miniaturization it becomes common the use of such transducers in structures with several dielectric layers (either substrates or superstrates). In a previous a work we proposed a model for the computation of the capacitance of these multi-layered structures using the techniques of conformal mapping and partial capacitance. Until now, that model has been used in applications where the permittivity of consecutive layers monotonically decreases from layer to layer (as we move away from the electrodes plane) giving excellent results. New applications, such as the use of Si/SiO2 substrates (to promote very smooth surfaces for electrodes deposition) or the use of passivation layers for the protection of electrodes (e.g. from liquids), among others, represent a new challenge for the computation of the overall capacitance since in these devices the permittivity can decrease from layer to layer. Under these conditions the original partial capacitance technique needs to be modified to include these new configurations. In this work we will discuss a new approach, splitting the concept of partial capacitance in parallel partial capacitance and serial partial capacitance where new conformal mapping transformations are proposed for the latter case. Hence this novel approach will extend our previous analytical model in order to account for the cases where there is a decrease in the permittivity from layer to layer. The results are compared with finite element simulation and experimental results. (C) 2011 Elsevier B.V. All rights reserved.
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