Techniques for Low-Power, High-Speed, High Effective-Resolution Pipeline ADCs in Deep Nanoscale CMOS | goes

Techniques for Low-Power, High-Speed, High Effective-Resolution Pipeline ADCs in Deep Nanoscale CMOS

Citation:: Goes, João, and Nuno Pereira. "Techniques for Low-Power, High-Speed, High Effective-Resolution Pipeline ADCs in Deep Nanoscale CMOS." High-Performance AD and DA Converters, IC Design in Scaled Technologies, and Time-Domain Signal Processing, Advances in Analog Circuit Design (AACD 2014). Ed. Springer. NY: Springer, 2014. 3-24.