Low-Voltage Electronics (ERT-A)


The course can be divided into 5 macro modules: 1) evolution of the roadmap of CMOS technology and major limitations imposed by the reduced supply voltage (e.g., degradation of the signal-to-noise ratio, degradation of transistors’ matching, problems in using more than 3 devices in stack, etc.); 2) advanced topologies of amplifiers and comparators employing positive-feedback schemes and able to operate at low supply voltages; 3) techniques for switches’ linearization (‘clook-bootstrapping’ circuits, switch-linearization circuits (SLCs), etc.); 4) the switched-opamp technique; 5) case studies from the state-of-the-art.